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[61.216.91.114]) by smtp.gmail.com with ESMTPSA id l63-v6sm16078781pfb.75.2018.11.12.19.42.27 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 12 Nov 2018 19:42:31 -0800 (PST) Date: Tue, 13 Nov 2018 11:42:08 +0800 From: Shawn Guo To: Rob Herring Cc: Kishon Vijay Abraham I , Sriharsha Allenki , Anu Ramanathan , Bjorn Andersson , Vinod Koul , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: phy: Add Qualcomm Synopsys High-Speed USB PHY binding Message-ID: <20181113034200.GD20049@tiger> References: <20181108070449.23572-1-shawn.guo@linaro.org> <20181108070449.23572-2-shawn.guo@linaro.org> <5bea0ed8.1c69fb81.8715.38b2@mx.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5bea0ed8.1c69fb81.8715.38b2@mx.google.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On Mon, Nov 12, 2018 at 01:24:51PM -0600, Rob Herring wrote: > On Thu, Nov 08, 2018 at 03:04:48PM +0800, Shawn Guo wrote: > > From: Sriharsha Allenki > > > > It adds bindings for Synopsys 28nm femto phy controller that supports > > LS/FS/HS usb connectivity on Qualcomm chipsets. > > > > Signed-off-by: Sriharsha Allenki > > Signed-off-by: Anu Ramanathan > > Signed-off-by: Bjorn Andersson > > Signed-off-by: Shawn Guo > > --- > > .../phy/qcom,snps-28nm-usb-hs-phy.txt | 101 ++++++++++++++++++ > > 1 file changed, 101 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt > > > > diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt b/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt > > new file mode 100644 > > index 000000000000..75e7a09dd558 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/qcom,snps-28nm-usb-hs-phy.txt > > @@ -0,0 +1,101 @@ > > +Qualcomm Synopsys 28nm Femto phy controller > > +=========================================== > > + > > +Synopsys 28nm femto phy controller supports LS/FS/HS usb connectivity on > > +Qualcomm chipsets. > > + > > +Required properties: > > + > > +- compatible: > > + Value type: > > + Definition: Should contain "qcom,usb-snps-hsphy". > > SoC specific compatible? Agreed. A SoC prefixed compatible would be more specific and scalable for handling different programming model of the same IP. I will use "qcom,qcs404-usb-hsphy" in v3. > > > + > > +- reg: > > + Value type: > > + Definition: USB PHY base address and length of the register map. > > + > > +- #phy-cells: > > + Value type: > > + Definition: Should be 0. > > + > > +- clocks: > > + Value type: > > + Definition: See clock-bindings.txt section "consumers". List of > > + three clock specifiers for reference, phy core and > > + sleep clocks. > > + > > +- clock-names: > > + Value type: > > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > > + property. Must contain "ref", "phy" and "sleep". > > + > > +- resets: > > + Value type: > > + Definition: See reset.txt section "consumers". PHY reset specifiers > > + for phy core and POR resets. > > + > > +- reset-names: > > + Value type: > > + Definition: Names of the resets in 1-1 correspondence with the "resets" > > + property. Must contain "phy" and "por". > > + > > +- vdd-supply: > > + Value type: > > + Definition: phandle to the regulator VDD supply node. > > + > > +- vdda1p8-supply: > > + Value type: > > + Definition: phandle to the regulator 1.8V supply node. > > + > > +- vdda3p3-supply: > > + Value type: > > + Definition: phandle to the regulator 3.3V supply node. > > + > > +- qcom,vdd-voltage-level: > > + Value type: > > + Definition: This is a list of three integer values where > > + each value corresponding to voltage corner in uV. > > + > > +Optional properties: > > + > > +- extcon: > > + Value type: > > + Definition: Should contain the vbus extcon. > > Don't use extcon for new bindings. Use usb-connector binding. Okay, I just did a bit of research and found that 'extcon' is becoming a deprecated DT property recently and we should OF graph bindings to specify the connector. Will do in v3. > > > + > > +- qcom,init-seq: > > + Value type: > > + Definition: Should contain a sequence of tuples to > > + program 'value' into phy register at 'offset' with 'delay' > > + in us afterwards. > > If we wanted this type of thing in DT, we'd have a generic binding (or > forth). Right now, this is a qualcomm usb phy specific bindings - first used in qcom,usb-hs-phy.txt and I extended it a bit for my phy. As this is not a so good hardware description, I'm a little hesitated to make it generic for other platforms to use in general. What about we put off it a little bit until we see more platforms need the same thing? Shawn > This should probably be split between SoC specific settings in > the driver and board properties in DT.