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From:   <Alex_Gagniuc@Dellteam.com>
To:     <helgaas@kernel.org>
Subject: Re: [PATCH v2] PCI/MSI: Don't touch MSI bits when the PCI device is
 disconnected
Thread-Topic: [PATCH v2] PCI/MSI: Don't touch MSI bits when the PCI device is
 disconnected
Thread-Index: AQHUT50UQ290XPGvJEGnaSTTjbCF+g==
Date:   Tue, 13 Nov 2018 22:39:15 +0000
Message-ID: <19136f44cd5c45e79bbef7e78a6bf332@ausx13mps321.AMER.DELL.COM>
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On 11/12/2018 11:02 PM, Bjorn Helgaas wrote:=0A=
> =0A=
> [EXTERNAL EMAIL]=0A=
> Please report any suspicious attachments, links, or requests for sensitiv=
e information.=0A=
> =0A=
> =0A=
> [+cc Jon, for related VMD firmware-first error enable issue]=0A=
> =0A=
> On Mon, Nov 12, 2018 at 08:05:41PM +0000, Alex_Gagniuc@Dellteam.com wrote=
:=0A=
>> On 11/11/2018 11:50 PM, Oliver O'Halloran wrote:=0A=
>>> On Thu, 2018-11-08 at 23:06 +0000, Alex_Gagniuc@Dellteam.com wrote:=0A=
> =0A=
>>>> But it's not the firmware that crashes. It's linux as a result of a=0A=
>>>> fatal error message from the firmware. And we can't fix that because F=
FS=0A=
>>>> handling requires that the system reboots [1].=0A=
>>>=0A=
>>> Do we know the exact circumsances that result in firmware requesting a=
=0A=
>>> reboot? If it happen on any PCIe error I don't see what we can do to=0A=
>>> prevent that beyond masking UEs entirely (are we even allowed to do=0A=
>>> that on FFS systems?).=0A=
>>=0A=
>> Pull a drive out at an angle, push two drives in at the same time, pull=
=0A=
>> out a drive really slow. If an error is even reported to the OS depends=
=0A=
>> on PD state, and proprietary mechanisms and logic in the HW and FW. OS=
=0A=
>> is not supposed to mask errors (touch AER bits) on FFS.=0A=
> =0A=
> PD?=0A=
=0A=
Presence Detect=0A=
=0A=
> Do you think Linux observes the rule about not touching AER bits on=0A=
> FFS?  I'm not sure it does.  I'm not even sure what section of the=0A=
> spec is relevant.=0A=
=0A=
I haven't found any place where linux breaks this rule. I'm very =0A=
confident that, unless otherwise instructed, we follow this rule.=0A=
=0A=
> The whole issue of firmware-first, the mechanism by which firmware=0A=
> gets control, the System Error enables in Root Port Root Control=0A=
> registers, etc., is very murky to me.  Jon has a sort of similar issue=0A=
> with VMD where he needs to leave System Errors enabled instead of=0A=
> disabling them as we currently do.=0A=
=0A=
Well, OS gets control via _OSC method, and based on that it should =0A=
touch/not touch the AER bits. The bits that get set/cleared come from =0A=
_HPX method, and there's a more about the FFS described in ACPI spec. It =
=0A=
seems that if platform, wants to enable VMD, it should pass the correct =0A=
bits via _HPX. I'm curious to know in what new twisted way FFS doesn't =0A=
work as intended.=0A=
=0A=
Alex=0A=
=0A=
> Bjorn=0A=
> =0A=
> [1] https://lore.kernel.org/linux-pci/20181029210651.GB13681@bhelgaas-gla=
ptop.roam.corp.google.com=0A=
> =0A=
=0A=