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[209.132.180.67]) by mx.google.com with ESMTP id w3-v6si13534842plb.154.2018.11.14.01.33.34; Wed, 14 Nov 2018 01:33:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@mobiveil.co.in header.s=google header.b=l0oUMgVi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727773AbeKNTfk (ORCPT + 99 others); Wed, 14 Nov 2018 14:35:40 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:38883 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727558AbeKNTfj (ORCPT ); Wed, 14 Nov 2018 14:35:39 -0500 Received: by mail-wr1-f65.google.com with SMTP id e3-v6so16485041wrs.5 for ; Wed, 14 Nov 2018 01:33:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mobiveil.co.in; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=D5Lp9ntbsbh28GYUXUxxGmzBKIyMj7U/1WLCquFYSRo=; b=l0oUMgVi8b67BPrJLTFJtkGqwT/S7KOtygHVB12epp3TAu+as9kZEYNzQ5xlB3/i3V C3xnHyo9y9fAYr5fqSM+ss9/25h26VRk88ljBcfwY9mI5paAIGJK9IHJFKsa/mnuSS9s cdDFCCYJgkvzRV1hqEisas4eE4Kptcmlt9EEE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=D5Lp9ntbsbh28GYUXUxxGmzBKIyMj7U/1WLCquFYSRo=; b=kEnpYYc+iouhgYHxHia049MJkXbKoJudeUmJqhuIkadmcXZ6cmpQ8AE/vAuxxXZg/9 x/tJG7doLq5XCP/cPTOD4Z+5jWYfdjdh3/aX8+QNfQ7hml9qxsJMhLHjEZvreUzh6gMu Qf+juuejf0K4DfIUovWyvd08PMot3XF8iAkMnPvXpJSa+Ixt18PKDrobtwjOJ1dj1p6a s+iLpT0r0nq8gsr5VmNI1dJYLEPwc4oF3hpSmDZq6K2kdmLDg5fn0+3RQzjsjrCMJLdr sKrHlE7+cZ+CyiThGixpJX/583HgPdjXdGf9BAKDqWg10fG6cKp9/RzHL3hAT7PbIg4q 0f6g== X-Gm-Message-State: AGRZ1gJubDIWxJFa4M3AcKYzkXJdAADhlAMUdSbTLUx60B3B4VO46Fwc Qt/ghD7HYZbc0l65JdRLd8kgVYzTzZ/7GcvCdAB5rw== X-Received: by 2002:a5d:4ec4:: with SMTP id s4-v6mr1066220wrv.32.1542187990966; Wed, 14 Nov 2018 01:33:10 -0800 (PST) MIME-Version: 1.0 References: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> <20181106131807.29951-16-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181106131807.29951-16-Zhiqiang.Hou@nxp.com> From: Subrahmanya Lingappa Date: Wed, 14 Nov 2018 15:03:26 +0530 Message-ID: Subject: Re: [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional To: "Z.q. Hou" Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Helgaas , robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, Leo Li , Lorenzo Pieralisi , Mingkai Hu , "M.h. Lian" , xiaowei.bao@nxp.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Acked-by: Subrahmanya Lingappa On Tue, Nov 6, 2018 at 6:50 PM Z.q. Hou wrote: > > From: Hou Zhiqiang > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > is not used in current code, and "apb_csr" is not used by some > platorms. > > Signed-off-by: Hou Zhiqiang > --- > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > index a618d4787dd7..64156993e052 100644 > --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > @@ -10,8 +10,10 @@ Required properties: > interrupt source. The value must be 1. > - compatible: Should contain "mbvl,gpex40-pcie" > - reg: Should contain PCIe registers location and length > + Mandatory: > "config_axi_slave": PCIe controller registers > "csr_axi_slave" : Bridge config registers > + Optional: > "gpio_slave" : GPIO registers to control slot power > "apb_csr" : MSI registers > > -- > 2.17.1 >