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[209.85.128.49]) by smtp.gmail.com with ESMTPSA id b26-v6sm6772455edw.0.2018.11.14.22.29.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Nov 2018 22:29:05 -0800 (PST) Received: by mail-wm1-f49.google.com with SMTP id f10-v6so17566945wme.3; Wed, 14 Nov 2018 22:29:05 -0800 (PST) X-Received: by 2002:a1c:13d2:: with SMTP id 201-v6mr3952081wmt.58.1542263344873; Wed, 14 Nov 2018 22:29:04 -0800 (PST) MIME-Version: 1.0 References: <20181004122855.22981-1-icenowy@aosc.io> <20181004122855.22981-5-icenowy@aosc.io> <4B5BD39B-22E2-4DEA-A199-29094DB8C317@aosc.io> In-Reply-To: From: Chen-Yu Tsai Date: Thu, 15 Nov 2018 14:28:51 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH v4 04/10] arm64: allwinner: dts: h6: add USB2-related device nodes To: Icenowy Zheng Cc: Rob Herring , Maxime Ripard , Kishon Vijay Abraham I , devicetree , linux-arm-kernel , linux-kernel , linux-sunxi@googlegroups.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 15, 2018 at 10:16 AM Chen-Yu Tsai wrote: > > On Wed, Nov 14, 2018 at 6:31 PM Icenowy Zheng wrote: > > 于 2018年11月14日 GMT+08:00 下午6:21:33, Chen-Yu Tsai 写到: > > >Hi, > > > > > >On Thu, Oct 4, 2018 at 8:30 PM Icenowy Zheng wrote: > > >> > > >> Allwinner H6 has two USB2 ports, one OTG and one host-only. > > >> > > >> Add device tree nodes related to them. > > >> > > >> Signed-off-by: Icenowy Zheng > > >> Reviewed-by: Chen-Yu Tsai > > >> --- > > >> No changes in v4. > > >> > > >> Changes in v3: > > >> - Removed the wrongly introduced usb3phy node. > > >> - Added Chen-Yu's Review tag. > > >> > > >> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 81 > > >++++++++++++++++++++ > > >> 1 file changed, 81 insertions(+) > > >> > > >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > >b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > >> index 040828d2e2c0..3d60af6cb3ae 100644 > > >> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > > >> @@ -258,6 +258,87 @@ > > >> status = "disabled"; > > >> }; > > >> > > >> + usb2otg: usb@5100000 { > > >> + compatible = "allwinner,sun8i-a33-musb"; > > > > > >I added an SoC-specific compatible: "allwinner,sun50i-h6-musb". > > > > > >I'm also curious as to whether the MUSB controller was tested or not, > > >since Allwinner now has EHCI/OHCI host pairs for host mode, and the > > >Pine H64 > > >only does host mode. > > > > USB plug-in detection relays on MUSB if it's enabled. > > That's not what I meant. Have you actually used the MUSB core in either > device or host mode to know that it is compatible with the A33? And > that it works correctly? > > IIRC ID detection is done by the PHY driver, using the GPIO lines. > In host mode, since it's already directly routed to the host pair, > it's the host pair that does plug-in detection. The MUSB core is > completely unused. It should be quite clear if you look at the times > each interrupt line fired. I forced the routing to use MUSB and it looks like it works OK. And the BSP figures for the number of endpoints looks correct. I'll push the patches out. Thanks. ChenYu