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[209.85.217.41]) by smtp.gmail.com with ESMTPSA id d195sm7286880vka.29.2018.11.15.21.03.38 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 21:03:38 -0800 (PST) Received: by mail-vs1-f41.google.com with SMTP id p193so12727720vsd.7 for ; Thu, 15 Nov 2018 21:03:38 -0800 (PST) X-Received: by 2002:a67:f598:: with SMTP id i24mr3932394vso.87.1542344617863; Thu, 15 Nov 2018 21:03:37 -0800 (PST) MIME-Version: 1.0 References: <20181116004247.172977-1-dbasehore@chromium.org> In-Reply-To: <20181116004247.172977-1-dbasehore@chromium.org> From: Doug Anderson Date: Thu, 15 Nov 2018 21:03:24 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: dts: rockchip: rk3399: Add xin32k clk To: Derek Basehore Cc: LKML , "open list:ARM/Rockchip SoC..." , Linux ARM , devicetree@vger.kernel.org, Tony Xie , Chris , ayaka@soulik.info, "nickey.yang" , =?UTF-8?B?6YOR6Iic5Lm+?= , Klaus Goger , Brian Norris , Enric Balletbo i Serra , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Mark Rutland , Rob Herring Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Nov 15, 2018 at 4:42 PM Derek Basehore wrote: > > This adds the xin32k clock to the RK3399 CPU. Even though it's not > directly used, muxes will end up traversing the entire clk tree on > calls to determine_rate if it doesn't exist. > > Signed-off-by: Derek Basehore > --- > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 99e7f65c1779..6a32293982d0 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -191,6 +191,13 @@ > #clock-cells = <0>; > }; > > + xin32k: xin32k { nit: xin32k is the name of the clock that rk3399 consumes. It seems a little weird to name this node with that name. Can you call this: ap_rtc_clk: ap-rtc-clk ...after the gru schematic? You wouldn't change the clock-output-names, just the node name / label. > + compatible = "fixed-clock"; > + clock-frequency = <32000>; I checked the datasheet for the 32K clock and it shows that this is a 32768 Hz clock, not a 32000 Hz one. I also checked the rk808 clock driver (which is supposed to be compatible with rk3399) and it produces a 32768 clock.