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[209.132.180.67]) by mx.google.com with ESMTP id e6si23535653pgd.428.2018.11.16.04.57.03; Fri, 16 Nov 2018 04:57:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=1h8FLQdu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389957AbeKPXIY (ORCPT + 99 others); Fri, 16 Nov 2018 18:08:24 -0500 Received: from mail.kernel.org ([198.145.29.99]:34178 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727965AbeKPXIX (ORCPT ); Fri, 16 Nov 2018 18:08:23 -0500 Received: from ziggy.de (unknown [93.176.133.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7264A22512; Fri, 16 Nov 2018 12:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542372966; bh=dpLq0vkDG34KOuZyGnY+rAYvDuqHjt2Dnb9kQAkm81w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=1h8FLQduNaxEjy4A5Cx5IvWTvt7T/Ifm9Ibqc4E0ERxASVcEHKyFwD+hm2d2eLyZ0 4AMj/FEIWRJgIVyr4A9v7iul/J2Sz8VtMFYog5SEYqMTSoiivj/Rf89pM6wc7IbeNx a+v98KL3Cimp9Vw3QZorcaXBTFfQZiZUNhst2eGA= From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, matthias.bgg@gmail.com Cc: sean.wang@mediatek.com, sean.wang@kernel.org, rdunlap@infradead.org, wens@csie.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger Subject: [PATCH v5 09/12] arm64: dts: mt2712e: Use the new mmsys clock compatible Date: Fri, 16 Nov 2018 13:54:46 +0100 Message-Id: <20181116125449.23581-10-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181116125449.23581-1-matthias.bgg@kernel.org> References: <20181116125449.23581-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matthias Brugger Move the clock part of the mmsys in a child node. Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index ee627a7c7b45..dd6837df92c7 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -412,9 +412,13 @@ }; mmsys: syscon@14000000 { - compatible = "mediatek,mt2712-mmsys", "syscon"; + compatible = "mediatek,mt2712-mmsys", "syscon", "simple-mfd"; reg = <0 0x14000000 0 0x1000>; - #clock-cells = <1>; + + mmsys_clk: clock-controller@14000000 { + compatible = "mediatek,mt2712-mmsys-clk"; + #clock-cells = <1>; + }; }; imgsys: syscon@15000000 { -- 2.19.1