Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp811541imu; Fri, 16 Nov 2018 10:33:47 -0800 (PST) X-Google-Smtp-Source: AJdET5cuv7IPdmDPgKpWWvD9tzxD09SmTrWco9MhEZAL8PIU5wA7tX2pYbM3J9Ee+3gfqADj7h4z X-Received: by 2002:a63:5207:: with SMTP id g7mr5374802pgb.253.1542393227033; Fri, 16 Nov 2018 10:33:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542393227; cv=none; d=google.com; s=arc-20160816; b=gLB2slH5X2k2Juu9M7FnShALzA5n3768KAScaEOaTSNtCm6YIf3x5WaPHsgIUG/r6Q 7SJFehhufNOwMKvb+hPoE40qXKVDHJnIoA5Ee4gTaoctkIy2G+3gTgjPyKU9e34YcA1y x68mZoK0Yuv9X2R7jLM8G2pTUIQMrwRbfLyctk/nXvKhgdGvDtxaFEK6CwBZPX1w+SOd XJFkukwqbQ6TZfxSf1uE1Yfmv5u3uXo7GiEu3VwgoBFbe7MjrvOJf3g80CPRpzwhSBZH Qd6ZMHhZE9w3+r++VNdiKuGo9galXNXEEgifxz0ZW5Ao5D6RgHaaiyFuJa1Q82aV9BXM LNgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=+BbP7AiyuH+uKDIwhg8JP7/ZbJYA8eASAq4y+bl9W/A=; b=n+4diPq0tUtJ4gPfOoN3Nma8teEsrtnci6JMP0zZh8grO773+6Xf6TVx+DE9ihIAfP 4ZfHY1eb2XTwY+orD2i1yeI8KVotbJZLKZFB7gicoeuO+E1orlznEbQT9ZvavsaVb+y4 uZyywD/JuwGbjNGtf11Jj5x6fO5mC0QxFY9/WHw0s+26FqZdlVbLOshjvUe6EwXkWFnA g1iLdjLI+F4rNurikX+SPaFsQTg8GUhB6vTAezcTnHdDCadM78XLmmrQy3sCpDT25DWc icHi2uqVFGrWw0wJ/Y2cSfeTsTC/ufgkurotzSFohpcZQA+w5w1oB6Yaj7I2L71L9qrk JdnA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=LJaYCu5X; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a17-v6si30718772pgf.443.2018.11.16.10.33.32; Fri, 16 Nov 2018 10:33:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=LJaYCu5X; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390315AbeKQEpe (ORCPT + 99 others); Fri, 16 Nov 2018 23:45:34 -0500 Received: from mail-ua1-f68.google.com ([209.85.222.68]:34339 "EHLO mail-ua1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727462AbeKQEpd (ORCPT ); Fri, 16 Nov 2018 23:45:33 -0500 Received: by mail-ua1-f68.google.com with SMTP id z23so8392123uam.1 for ; Fri, 16 Nov 2018 10:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=+BbP7AiyuH+uKDIwhg8JP7/ZbJYA8eASAq4y+bl9W/A=; b=LJaYCu5XSH5yf6pWi8Ea/Ci0mJ5AX2Y8Y8qSp50fjyBczz2KtQdED70To/xg2/SNvR GIkWS1OHQtnptqNPlbIHdG+ZwdPJTNvqAvNYe8CoWuRzZofD2TynuKIzUBdeOenM1izl PvY2Zx1VhVFHWUJtTiYYej8Xeg1zcNPDzYlng= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=+BbP7AiyuH+uKDIwhg8JP7/ZbJYA8eASAq4y+bl9W/A=; b=eLhc7dG7Rcg8BL5/u3tq97WXTvasZaSsYfGC6o3sBWPSFwB5hUheKed/SmVN6U3tRS CwNygQKBmSHHL1BoOLPxNeLrz8rqK6GCaPx4zVPEqVoRhDouUZPdDMczcmnzW/m8cE0g cYtKliy1lcqqiufOL0NxSV2euq17OM6dGi7B7kmvBH62Lls6CT3Vnyh4008vCRFexCU+ U8xXUcMKowqyQ/ajui4Z/P9Sj1h4wciZJ9+IEW2tcqoXcN9FGLW6q8GnHjRxCBGiucE6 EX3yp7nld2UZgXgCoJnEPklkORfDxx8ub9RGbi43nCCMXsjjp+lFCKfjCR5BTZnRqjmo MEZQ== X-Gm-Message-State: AGRZ1gJhPCNeVS8+egJP1H2HkHr5I1a0TQPFitIpyyQnxy9F1MKsW40R 2/rPVdP+0uEMX2rDUYfg99ltC4gZYXk= X-Received: by 2002:a9f:2709:: with SMTP id a9mr3025578uaa.10.1542393122972; Fri, 16 Nov 2018 10:32:02 -0800 (PST) Received: from mail-vs1-f54.google.com (mail-vs1-f54.google.com. [209.85.217.54]) by smtp.gmail.com with ESMTPSA id j95sm5332391uad.6.2018.11.16.10.32.02 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 10:32:02 -0800 (PST) Received: by mail-vs1-f54.google.com with SMTP id y27so14325787vsi.1 for ; Fri, 16 Nov 2018 10:32:02 -0800 (PST) X-Received: by 2002:a67:1505:: with SMTP id 5mr4490119vsv.20.1542392650750; Fri, 16 Nov 2018 10:24:10 -0800 (PST) MIME-Version: 1.0 References: <20181116051719.23376-1-dbasehore@chromium.org> In-Reply-To: From: Doug Anderson Date: Fri, 16 Nov 2018 10:23:59 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: dts: rockchip: rk3399: Add xin32k clk To: Derek Basehore Cc: LKML , "open list:ARM/Rockchip SoC..." , Linux ARM , devicetree@vger.kernel.org, Tony Xie , Chris , ayaka@soulik.info, "nickey.yang" , =?UTF-8?B?6YOR6Iic5Lm+?= , Klaus Goger , Brian Norris , Enric Balletbo i Serra , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Mark Rutland , Rob Herring Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Fri, Nov 16, 2018 at 9:39 AM dbasehore . wrote: > > On Fri, Nov 16, 2018 at 8:01 AM Doug Anderson wrote: > > > > Hi, > > > > On Thu, Nov 15, 2018 at 9:17 PM Derek Basehore wrote: > > > > > > This adds the xin32k clock to the RK3399 CPU. Even though it's not > > > directly used, muxes will end up traversing the entire clk tree on > > > calls to determine_rate if it doesn't exist. > > > > > > Signed-off-by: Derek Basehore > > > --- > > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 7 +++++++ > > > 1 file changed, 7 insertions(+) > > > > nit: I would have expected ${SUBJECT} to have v2 in it somewhere. > > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > > index 99e7f65c1779..3d09472978f8 100644 > > > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > > > Aww crud. I was at the airport yesterday and so I didn't notice that > > you were touching rk3399, not rk3399-gru. This belongs in the gru > > device tree file, not in the top level rk3399. As you have written > > this it will break rk3399 boards that have an rk808 on them, AKA: > > Should this be moved to the rk3399.dtsi file? The RK3399 assumes that > this clk exists (same as the 24MHz clk which is in rk3399.dtsi). While > it can function without it defined, it really shouldn't. We can just > assign the existing labels in the dts files you pointed out. No, it should be in the board files. Each board may produce the 32k clock through a different component. On gru-based devices we produce the 32k clock through a silego part. On some other ones we produce it from rk808. Technically you could say that we don't _truly_ need to model this clock and we could have just inserted a dummy/fixed 32k clock in the clk-rk3399.c file. ...but we did model it so that means we should probably model it semi-properly. If a given board forgets to provide a 32k clock then that's a bug for them like it was for us. -Doug