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From:   gengdongjiu <gengdj.1984@gmail.com>
Date:   Sat, 17 Nov 2018 23:41:29 +0800
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Subject: Resend: How to handle the SMMU RAS Error in the kernel
To:     robin.murphy@arm.com, James Morse <james.morse@arm.com>,
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Cc:     xuqiang36@huawei.com,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        gengdongjiu <gengdongjiu@huawei.com>
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Hi robin/will/James


In the current kernel, it only handles three kinds of error, which is
memory error, PCIE device and ARM process. But now the SMMU already
support the RAS, how to handle the SMMU RAS error in the kernel?

I check the UEFI_SPEC_2.7, the ACPI's CPER have the IOMMU type, but it
seems the IOMMU type only are specific to AMD=E2=80=99s IOMMU specification=
,
not have the ARM=E2=80=99s IOMMU section type, can we reuse this IOMMU sect=
ion
type for the ARM SMMU?


N.2.11.3 IOMMU specific DMAr Error Section

Type: {0x036F84E1, 0x7F37, 0x428c, {0xA7, 0x9E, 0x57, 0x5F, 0xDF,
0xAA, 0x84, 0xEC}}

All fields in this error record are specific to AMD=E2=80=99s IOMMU
specification. This error section has a fixed size.