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From:   "Yang, Shunyong" <shunyong.yang@hxt-semitech.com>
To:     "bhelgaas@google.com" <bhelgaas@google.com>
CC:     "okaya@kernel.org" <okaya@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Zheng, Joey" <yu.zheng@hxt-semitech.com>
Subject: Re: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed
 errata
Thread-Topic: [PATCH v2 2/2] PCI: pciehp: Add HXT quirk for Command Completed
 errata
Thread-Index: AQHUdmrzK+cv2Db6mkeg7e7p7Mrs0A==
Date:   Mon, 19 Nov 2018 01:07:39 +0000
Message-ID: <77c4a0a9a9174e0aa5d94dada2e0be15@HXTBJIDCEMVIW01.hxtcorp.net>
References: <bcaf1d5d-23a6-d4e6-08e8-587daf6cca06@kernel.org>
 <5e88860c8426df537c5a5f2d0e6add6df8955a0f.1541574331.git.shunyong.yang@hxt-semitech.com>
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Hi, Bjorn,
  Would you please help to review and pull these two quirk patches to
your branch if there is no problem?

Thanks.
Shunyong.

On 2018/11/7 15:24, Yang, Shunyong wrote:
> The HXT SD4800 PCI controller does not set the Command Completed
> bit unless writes to the Slot Command register change "Control"
> bits.
> 
> This patch adds SD4800 to the quirk.
> 
> Cc: Joey Zheng <yu.zheng@hxt-semitech.com>
> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com>
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..91db67963aea 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -920,3 +920,5 @@ static void quirk_cmd_compl(struct pci_dev *pdev)
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>  DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_QCOM, 0x0401,
>  			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
> +DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_HXT, 0x0401,
> +			      PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl);
>