Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp2162374imu; Sun, 18 Nov 2018 17:25:30 -0800 (PST) X-Google-Smtp-Source: AJdET5e1FAOSVifJsIGY5UxuIm5OFdFN7H2zsfcJB3MCybf28aIKzrBklLNxEP7wvsWPlwd+4wNO X-Received: by 2002:a63:9dca:: with SMTP id i193-v6mr17005932pgd.98.1542590730014; Sun, 18 Nov 2018 17:25:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542590729; cv=none; d=google.com; s=arc-20160816; b=NB6v60p1WYlP8lohi+kNqJRSTrgXn2/R40LG1o4XOER2Hh7us2cHc5Ra6ejW4klCkG khwjmio06j4qZd/N+MezVuX6gw8BvXmB5iui+iuwOIcgzstvVk68WKRBi/BDpojsn4j3 2I2oyo+UiCwava0EdsFsJPfL5Xhoc6R6810PbB8cKLcrKkyJ1rbKtB5kLPOBcDoJAWWW dut/tKy2zhw36JVjbMDMjqQ2T8nyu8aNtyOdG5Bo9RYi2kG0zuMrOAW0NbbDzkvoHCm9 oUAImpFk8OYUfnOg0u8GIXr9hjoOZ0R4SnAgFRrHCY8e73zzUVTks/AZEgKNHijKqkKt AYKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:subject:from:references:in-reply-to :message-id:cc:to; bh=WM6VNFGUqavypY54c5jTIM8HfdltUkd9g5Np95FwjX0=; b=ydpY75bz7079oa7j/PTPacx9lwi5mINBbn4qA+oe6MvqYUh6qrRgbthrd99N90fIoY J5dOG+44xe8GXT4ox9azPa3jxODb6lEZbTvkipOADSLNghujfX2FoQGFBLFFfLAlTf9D pxBHEbF2a2qxODAL1tRtWRX/n9v+3AMw2JqWCYXkw/W/Vc7y1Wpxl/HyjA7feAk15dev 3OYi4N/8hAHP1xBEe54CekzTu0ynWYyGzof2cEFEaIooMdKT1MoiS3HTNU7Y8cpugstm ngcbfBq+UTopxTTfdc9j0p50dSN98ajz4XznbF0w45WQcpGCkdf4LvHRpNkPDam7iCWb 5IQQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r2si36432966pgo.483.2018.11.18.17.25.15; Sun, 18 Nov 2018 17:25:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728247AbeKSLok (ORCPT + 99 others); Mon, 19 Nov 2018 06:44:40 -0500 Received: from kvm5.telegraphics.com.au ([98.124.60.144]:49254 "EHLO kvm5.telegraphics.com.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726235AbeKSLoS (ORCPT ); Mon, 19 Nov 2018 06:44:18 -0500 Received: by kvm5.telegraphics.com.au (Postfix, from userid 502) id 3A66D29E00; Sun, 18 Nov 2018 20:22:18 -0500 (EST) To: Geert Uytterhoeven Cc: Andreas Schwab , Arnd Bergmann , Stephen N Chivers , Thomas Gleixner , Daniel Lezcano , Michael Schmitz , John Stultz , Linus Walleij , linux-m68k@lists.linux-m68k.org, linux-kernel@vger.kernel.org Message-Id: In-Reply-To: References: From: Finn Thain Subject: [RFC PATCH v2 11/14] m68k: mvme147: Convert to clocksource API Date: Mon, 19 Nov 2018 12:10:38 +1100 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a platform clocksource by adapting the existing arch_gettimeoffset implementation. Signed-off-by: Finn Thain Acked-by: Linus Walleij --- Changed since v1: - Moved clk_total access to within the irq lock. - Use type u32 for tick counter. --- arch/m68k/include/asm/mvme147hw.h | 1 - arch/m68k/mvme147/config.c | 38 ++++++++++++++++++++++++++----- 2 files changed, 32 insertions(+), 7 deletions(-) diff --git a/arch/m68k/include/asm/mvme147hw.h b/arch/m68k/include/asm/mvme147hw.h index 9c7ff67c5ffd..7c3dd513128e 100644 --- a/arch/m68k/include/asm/mvme147hw.h +++ b/arch/m68k/include/asm/mvme147hw.h @@ -66,7 +66,6 @@ struct pcc_regs { #define PCC_INT_ENAB 0x08 #define PCC_TIMER_INT_CLR 0x80 -#define PCC_TIMER_PRELOAD 63936l #define PCC_LEVEL_ABORT 0x07 #define PCC_LEVEL_SERIAL 0x04 diff --git a/arch/m68k/mvme147/config.c b/arch/m68k/mvme147/config.c index 4ef4faa5ed8b..82b53b5ca82b 100644 --- a/arch/m68k/mvme147/config.c +++ b/arch/m68k/mvme147/config.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -92,6 +93,21 @@ void __init config_mvme147(void) vme_brdtype = VME_TYPE_MVME147; } +static u64 mvme147_read_clk(struct clocksource *cs); + +static struct clocksource mvme147_clk = { + .name = "pcc", + .rating = 250, + .read = mvme147_read_clk, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static u32 clk_total; + +#define PCC_TIMER_CLOCK_FREQ 160000 +#define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ) +#define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES) /* Using pcc tick timer 1 */ @@ -103,6 +119,7 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id) local_irq_save(flags); m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; + clk_total += PCC_TIMER_CYCLES; timer_routine(0, NULL); local_irq_restore(flags); @@ -112,32 +129,41 @@ static irqreturn_t mvme147_timer_int (int irq, void *dev_id) void mvme147_sched_init (irq_handler_t timer_routine) { - if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, 0, "timer 1", - timer_routine)) + if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER, + "timer 1", timer_routine)) pr_err("Couldn't register timer interrupt\n"); /* Init the clock with a value */ - /* our clock goes off every 6.25us */ + /* The clock counter increments until 0xFFFF then reloads */ m147_pcc->t1_preload = PCC_TIMER_PRELOAD; m147_pcc->t1_cntrl = 0x0; /* clear timer */ m147_pcc->t1_cntrl = 0x3; /* start timer */ m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR; /* clear pending ints */ m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1; + + clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ); } -/* This is always executed with interrupts disabled. */ /* XXX There are race hazards in this code XXX */ -u32 mvme147_gettimeoffset(void) +static u64 mvme147_read_clk(struct clocksource *cs) { + unsigned long flags; volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012; unsigned short n; + u32 ticks; + + local_irq_save(flags); n = *cp; while (n != *cp) n = *cp; n -= PCC_TIMER_PRELOAD; - return ((unsigned long)n * 25 / 4) * 1000; + ticks = clk_total + n; + + local_irq_restore(flags); + + return ticks; } static int bcd2int (unsigned char b) -- 2.18.1