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[209.132.180.67]) by mx.google.com with ESMTP id o10si40061575pgs.531.2018.11.19.04.21.53; Mon, 19 Nov 2018 04:22:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="H/3cpRTx"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729047AbeKSWo1 (ORCPT + 99 others); Mon, 19 Nov 2018 17:44:27 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:36023 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728738AbeKSWo1 (ORCPT ); Mon, 19 Nov 2018 17:44:27 -0500 Received: by mail-lf1-f68.google.com with SMTP id a16so2367991lfg.3 for ; Mon, 19 Nov 2018 04:20:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=yVSy+uRJIJhKGegpw54bdgZPAeH6fG67Foz3V97ekgc=; b=H/3cpRTxJbpsF7Blh132PgvUO7zD4BkC9pIdNrDv/6ZyP+5kpHoMXSHRDYtRU72L2l 8fT9nGCOJTB72/MBWTYF9D8kc98DwrtKmMgDZmsSW64GDsR4lvK8RdKyTNa89seZsc9o 4H+IP98Kr3XQ6ffFTF+Dn508Zd1c3hbSq+Bi0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yVSy+uRJIJhKGegpw54bdgZPAeH6fG67Foz3V97ekgc=; b=hxjb8vBWKan7+i3PA48j1xuJlz1XfLeDA7UJYPmMJegXpbwdFCI73JbDd1Hrw33Jiq QedkdIGJJxKbiFH7F9Ssx9tuzPQ+5FRJx15hgoZwuW+SyPomBqSayAhJHcZCQkLV3Mi2 EQLO/uDgqL5DFe1PbVdLJ8ekaLT/KhYyR6YvY527kmtVM5Cu2xiX/e1NnB8o7wBjKvPP Qh3j0p6qV0FzD9maOkTr+tF2UV0kVo0qHuDqShBIvERdRLSt9Z1xh3PjfsxFH53ggKhw vyDhQxSd4rFgfBkNE/jUIOCJDOI4BSXAH5dLB3pOiIikbn9Kqbm34uYKC7v5yC/VB6xe VR9g== X-Gm-Message-State: AGRZ1gIpX2SagL5Yb/Y/InVULXWZiB9bvIRAT/+mXJNRL2eyPwzsuowB 1eGVC6ZugRjU1dHPCmZkNVpv+IOVSzcUOLseERpM1A== X-Received: by 2002:a19:41c4:: with SMTP id o187mr11201597lfa.32.1542630057789; Mon, 19 Nov 2018 04:20:57 -0800 (PST) MIME-Version: 1.0 References: <20181113095142.32015-1-benjamin.gaignard@st.com> <20181113095142.32015-3-benjamin.gaignard@st.com> In-Reply-To: <20181113095142.32015-3-benjamin.gaignard@st.com> From: Linus Walleij Date: Mon, 19 Nov 2018 13:20:46 +0100 Message-ID: Subject: Re: [PATCH 2/3] pinctrl: stm32: protect configuration registers with a hwspinlock To: Benjamin Gaignard Cc: Rob Herring , Alexandre TORGUE , "open list:GPIO SUBSYSTEM" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux ARM , "linux-kernel@vger.kernel.org" , linux-stm32@st-md-mailman.stormreply.com, Benjamin Gaignard Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 13, 2018 at 10:51 AM Benjamin Gaignard wrote: > If a hwspinlock if defined in device tree use it to protect > configuration registers. > > Signed-off-by: Benjamin Gaignard Patch applied with Alex' ACK. Out of curiosity: what is it protecting against? I would guess simultaneous access from another CPU but the commit doesn't say. Simultaneous access from two CPUs makes it extra important that all register access is read-modify-write, so I'd have a second check over the code to make sure this is the case. Yours, Linus Walleij