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[86.49.110.70]) by smtp.gmail.com with ESMTPSA id h127sm19045820wmd.31.2018.11.19.05.49.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Nov 2018 05:49:32 -0800 (PST) Subject: Re: [PATCH 2/2] dt-binding: spi: Document Renesas R-Car RPC controller bindings To: Mason Yang , broonie@kernel.org, tpiepho@impinj.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Simon Horman Cc: boris.brezillon@bootlin.com, juliensu@mxic.com.tw, Geert Uytterhoeven , zhengxunli@mxic.com.tw References: <1542621690-10229-1-git-send-email-masonccyang@mxic.com.tw> <1542621690-10229-3-git-send-email-masonccyang@mxic.com.tw> From: Marek Vasut Message-ID: <629a5d6f-5c13-9b24-1c21-461d09f1aa8a@gmail.com> Date: Mon, 19 Nov 2018 14:49:31 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <1542621690-10229-3-git-send-email-masonccyang@mxic.com.tw> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/19/2018 11:01 AM, Mason Yang wrote: > Document the bindings used by the Renesas R-Car D3 RPC controller. > > Signed-off-by: Mason Yang > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt | 33 ++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > > diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > new file mode 100644 > index 0000000..8286cc8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,33 @@ > +Renesas R-Car D3 RPC controller Device Tree Bindings > +---------------------------------------------------- > + > +Required properties: > +- compatible: should be "renesas,rpc-r8a77995" > +- #address-cells: should be 1 > +- #size-cells: should be 0 > +- reg: should contain 2 entries, one for the registers and one for the direct > + mapping area > +- reg-names: should contain "rpc_regs" and "dirmap" > +- interrupts: interrupt line connected to the RPC SPI controller Do you also plan to support the RPC HF mode ? And if so, how would that look in the bindings ? I'd like to avoid having to redesign the bindings later to handle both the SPI and HF modes. The HF is roughly a CFI flash with different bus interface. btw U-Boot has drivers for both the HF and SPI mode: http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/mtd/renesas_rpc_hf.c http://git.denx.de/?p=u-boot.git;a=blob;f=drivers/spi/renesas_rpc_spi.c > +- clock-names: should contain "clk_rpc" > +- clocks: should contain 1 entries for the CPG Module 917 clocks > + > +Example: > + > + rpc: spi@ee200000 { > + compatible = "renesas,rpc-r8a77995"; > + reg = <0 0xee200000 0 0x8100>, <0 0x08000000 0 0x4000000>; > + reg-names = "rpc_regs", "dirmap"; > + clocks = <&cpg CPG_MOD 917>; > + clock-names = "clk_rpc"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; > + }; > + }; > -- Best regards, Marek Vasut