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[209.132.180.67]) by mx.google.com with ESMTP id 44-v6si44692384plc.244.2018.11.19.13.51.31; Mon, 19 Nov 2018 13:51:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Eylkn7qE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731227AbeKTIQb (ORCPT + 99 others); Tue, 20 Nov 2018 03:16:31 -0500 Received: from mail.kernel.org ([198.145.29.99]:53268 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730748AbeKTIQb (ORCPT ); Tue, 20 Nov 2018 03:16:31 -0500 Received: from mail-qk1-f182.google.com (mail-qk1-f182.google.com [209.85.222.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2D4E92089F; Mon, 19 Nov 2018 21:50:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542664251; bh=6bygkLwsb0YUNSJWyyRLhCDP3vqr+MJ5xKx61huKdiA=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=Eylkn7qER5mkalzUtTQrfBc5ZLixORqZPFokPTRhEyOFjTeoYMu5ywJhlU6BmFieK Ux6eg2YrLjRAbDuv5KPQEhzzTlxhLComhVKu7qVbhIGCIwlK6nN9sYDMKySFizoYif EXfWLmfcOq7PiUmGBRavXJb6DtSZQrSOzn4QGBw0= Received: by mail-qk1-f182.google.com with SMTP id d135so51269431qkc.12; Mon, 19 Nov 2018 13:50:51 -0800 (PST) X-Gm-Message-State: AGRZ1gJNaaG5Gk4XK7u7hJQOp5VNn116IR8mH0ugM0O/1yY5XZPOXskf aLITXyMKnvynaXVFNjLXif2xCTwXoIpJP3+98A== X-Received: by 2002:aed:3ecf:: with SMTP id o15mr23142151qtf.26.1542664250368; Mon, 19 Nov 2018 13:50:50 -0800 (PST) MIME-Version: 1.0 References: <20181113130910.22130-1-phil.edworthy@renesas.com> <20181113130910.22130-2-phil.edworthy@renesas.com> <20181117143253.GA27381@bogus> In-Reply-To: From: Rob Herring Date: Mon, 19 Nov 2018 15:50:39 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 1/2] dt-bindings/interrupt-controller: rzn1: Add RZ/N1 gpio irq mux binding To: Phil Edworthy Cc: Marc Zyngier , Thomas Gleixner , Jason Cooper , Mark Rutland , Geert Uytterhoeven , "open list:MEDIA DRIVERS FOR RENESAS - FCP" , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 19, 2018 at 3:39 AM Phil Edworthy wrote: > > Hi Rob, > > On 17 November 2018 14:33 Rob Herring wrote: > > On Tue, Nov 13, 2018 at 01:09:09PM +0000, Phil Edworthy wrote: > > > Add device binding documentation for the Renesas RZ/N1 GPIO interrupt > > > multiplexer. > > > > > > Signed-off-by: Phil Edworthy > > > --- > > > v3: > > > - Use 'interrupt-map' DT property correctly. > > > v2: > > > - Use interrupt-map to allow the GPIO controller info to be specified > > > as part of the irq. > > > - Don't show status in binding examples. > > > - Don't show the soc/board split in binding doc. > > > --- > > > .../interrupt-controller/renesas,rzn1-mux.txt | 73 > > > +++++++++++++++++++ > > > 1 file changed, 73 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/interrupt-controller/renesas,rzn1-mu > > > x.txt > > > > A few nits, otherwise: > > > > Reviewed-by: Rob Herring > Thanks for the review! > > > > > > > diff --git > > > a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzn1- > > > mux.txt > > > b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzn1- > > > mux.txt > > > new file mode 100644 > > > index 000000000000..6515880e25cc > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,r > > > +++ zn1-mux.txt > > > @@ -0,0 +1,73 @@ > > > +* Renesas RZ/N1 GPIO Interrupt Multiplexer > > > + > > > +On Renesas RZ/N1 devices, there are several GPIO Controllers each > > > +with a number of interrupt outputs. All of the interrupts from the > > > +GPIO Controllers are passed to the GPIO Interrupt Multiplexer, which > > > +selects a sub-set of the interrupts to pass onto the system interrupt > > controller. > > > + > > > +A single node in the device tree is used to describe the GPIO IRQ Muxer. > > > + > > > +Required properties: > > > +- compatible: SoC-specific compatible string "renesas,- > > gpioirqmux" > > > + followed by "renesas,rzn1-gpioirqmux" as fallback. The SoC-specific > > > +compatible > > > + strings must be one of: > > > + "renesas,r9a06g032-gpioirqmux" for RZ/N1D > > > + "renesas,r9a06g033-gpioirqmux" for RZ/N1S > > > +- reg: Base address and size of GPIO IRQ Muxer registers. > > > +- interrupts: List of output interrupts. > > > +- #interrupt-cells: Numder of cells in the input interrupt specifier, must be > > 1. > > > +- #address-cells: Must be 0. > > > +- interrupt-map-mask: must be 127. > > > +- interrupt-map: Standard property detailing the maps between input > > > +irqs and the > > > + corresponding output irq. This consist of a list of: > > > + > > > + The input-irq-spec is from 0 to 95, corresponding to the outputs of > > > +the GPIO > > > + Controllers. > > > + > > > +Example: > > > + > > > + The following is an example for the RZ/N1D SoC. > > > + > > > + gpioirqmux: gpioirqmux@51000480 { > > > > interrupt-controller@... > Sure > > > > + compatible = "renesas,r9a06g032-gpioirqmux", > > > + "renesas,rzn1-gpioirqmux"; > > > + reg = <0x51000480 0x20>; > > > + interrupts = > > > + , > > > + ; > > > > This is a bit redundant as the same information is in interrupt-map, but I > > guess you need it to get the irq resources. > That's right. > > > > + > > > + #interrupt-cells = <1>; > > > + #address-cells = <0>; > > > + interrupt-map-mask = <127>; > > > > Use hex for masks. > Ok. > > > > + interrupt-map = > > > + /* gpio2a 24, pin 146: ETH Port 1 IRQ */ > > > + <88 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, > > > + /* gpio2a 26, pin 148: TouchSCRN_IRQ */ > > > + <90 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; > > > + }; > > > + > > > + gpio2: gpio@5000d000 { > > > + compatible = "snps,dw-apb-gpio"; > > > + reg = <0x5000d000 0x80>; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + clock-names = "bus"; > > > + clocks = <&sysctrl R9A06G032_HCLK_GPIO2>; > > > + > > > + gpio2a: gpio-controller@0 { > > > > gpio@0 > Are you sure about this? Yes, 'gpio' is what the DT spec says. It is the oddball though and I always have to think about it. > The bindings in Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt > show an example where the sub-nodes for gpio banks are gpio-controller@. > This is also in Documentation/devicetree/bindings/gpio/gpio.txt. Indeed. Those should be fixed. I would be easily persuaded to just change the spec, but 'gpio@' is much more widely used: $ git grep gpio@ -- arch/ | wc 1110 4378 67766 $ git grep gpio-controller@ -- arch/ | wc 60 232 4270 Rob