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From:   "M.h. Lian" <minghuan.lian@nxp.com>
To:     "Z.q. Hou" <zhiqiang.hou@nxp.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
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CC:     Mingkai Hu <mingkai.hu@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: RE: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/IO
 outbound windows
Thread-Topic: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in
 MEM/IO outbound windows
Thread-Index: AQHUgLMQsrQshiueh0e3aoUcxeibAqVYd8VA
Date:   Tue, 20 Nov 2018 10:34:23 +0000
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References: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com>
 <20181120092615.11680-6-Zhiqiang.Hou@nxp.com>
In-Reply-To: <20181120092615.11680-6-Zhiqiang.Hou@nxp.com>
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reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>

> -----Original Message-----
> From: Z.q. Hou
> Sent: Tuesday, November 20, 2018 5:26 PM
> To: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> l.subrahmanya@mobiveil.co.in; shawnguo@kernel.org; Leo Li
> <leoyang.li@nxp.com>; lorenzo.pieralisi@arm.com;
> catalin.marinas@arm.com; will.deacon@arm.com
> Cc: Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian
> <minghuan.lian@nxp.com>; Xiaowei Bao <xiaowei.bao@nxp.com>; Z.q. Hou
> <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 05/25] PCI: mobiveil: correct PCI base address in MEM/I=
O
> outbound windows
>=20
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>=20
> It should get PCI base address from the DT node property 'ranges'
> to setup MEM/IO outbound windows instead of always zero.
>=20
> Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP dri=
ver")
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> ---
> V2:
>  - Added fixes entry.
>=20
>  drivers/pci/controller/pcie-mobiveil.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>=20
> diff --git a/drivers/pci/controller/pcie-mobiveil.c
> b/drivers/pci/controller/pcie-mobiveil.c
> index a0dd337c6214..8ff873023b5f 100644
> --- a/drivers/pci/controller/pcie-mobiveil.c
> +++ b/drivers/pci/controller/pcie-mobiveil.c
> @@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie
> *pcie)
>=20
>  		/* configure outbound translation window */
>  		program_ob_windows(pcie, pcie->ob_wins_configured,
> -				   win->res->start, 0, type,
> -				   resource_size(win->res));
> +				   win->res->start,
> +				   win->res->start - win->offset,
> +				   type, resource_size(win->res));
>  	}
>=20
>  	/* setup MSI hardware registers */
> --
> 2.17.1