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[209.132.180.67]) by mx.google.com with ESMTP id w2si40472910pgh.565.2018.11.20.04.33.50; Tue, 20 Nov 2018 04:34:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dLvSqx/A"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726300AbeKTTGi (ORCPT + 99 others); Tue, 20 Nov 2018 14:06:38 -0500 Received: from mail-oi1-f195.google.com ([209.85.167.195]:40097 "EHLO mail-oi1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725846AbeKTTGi (ORCPT ); Tue, 20 Nov 2018 14:06:38 -0500 Received: by mail-oi1-f195.google.com with SMTP id t204so853150oie.7 for ; Tue, 20 Nov 2018 00:38:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=kqJYfxRnFQiop1CyETTyAIIILPqYb9mzoIqszr+2Z5Q=; b=dLvSqx/Atg+ftvB41Y6e6IStG/Z2hiJWYrdi1+EXg0atsTuG53SwZudggMJRduLLsF fItL9SFwftNltcZVO8nZ94EhF499enzW0flWkEdWZ1OfKSQLTa4JB05cW3YcEdw28x+m fBbm1Arr955LY2Zuq67jbU3MI7q+uUeY/FyIY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=kqJYfxRnFQiop1CyETTyAIIILPqYb9mzoIqszr+2Z5Q=; b=GRjYdTGi1zfL+XbqBi8tdhgStK8DvS8cAr0hfYunpV+iIJOtRiUzysot317CCgit9l fuFRa+hU9opAfnOw4qevyErBErNYbadfx4xlE4vRgbSePpalUmu/6lLu9Mi1ogKFrTa2 GFPHo6oZtry5Q81CYK5miwQiM6z6wOYSBlxVjdie/xAzKCxqIwg+nrsxZgJubwXlWg7I 75092dqkJijsoSUEr0/OvGI0mUCEencr7jx8kDOBdKxHsLM7ME8mAyDV9KOvy5fawXPq blkOm2JpqvuJ3qlyoNX0nB6jcPphprwZC2izLS9ti7pg0+M1t0sJpu9enN7NAe3bs/E+ Lfiw== X-Gm-Message-State: AGRZ1gIp68NNoUDAOeX9Rb1nNZrXcIAPy0fPz5Ao0Aus3+ssH0vnW5gU EhAtEcEKzP3EZB58zoWs3gK3+yzeSpGUnUZWX/pgYQ== X-Received: by 2002:aca:dd08:: with SMTP id u8-v6mr580144oig.94.1542703121752; Tue, 20 Nov 2018 00:38:41 -0800 (PST) MIME-Version: 1.0 References: <20181113095142.32015-1-benjamin.gaignard@st.com> <20181113095142.32015-3-benjamin.gaignard@st.com> In-Reply-To: From: Benjamin Gaignard Date: Tue, 20 Nov 2018 09:38:30 +0100 Message-ID: Subject: Re: [PATCH 2/3] pinctrl: stm32: protect configuration registers with a hwspinlock To: Linus Walleij Cc: Rob Herring , Alexandre Torgue , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Linux ARM , Linux Kernel Mailing List , linux-stm32@st-md-mailman.stormreply.com, Benjamin GAIGNARD Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le lun. 19 nov. 2018 =C3=A0 13:20, Linus Walleij = a =C3=A9crit : > > On Tue, Nov 13, 2018 at 10:51 AM Benjamin Gaignard > wrote: > > > If a hwspinlock if defined in device tree use it to protect > > configuration registers. > > > > Signed-off-by: Benjamin Gaignard > > Patch applied with Alex' ACK. Thanks > > Out of curiosity: what is it protecting against? > I would guess simultaneous access from another CPU > but the commit doesn't say. > > Simultaneous access from two CPUs makes it extra important > that all register access is read-modify-write, so I'd have a second > check over the code to make sure this is the case. Yes it is to protect configuration registers from being used at the same by cortexA and cortexM. > > Yours, > Linus Walleij