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Lian" To: "Z.q. Hou" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" CC: Mingkai Hu , Xiaowei Bao Subject: RE: [PATCHv2 17/25] PCI: mobiveil: fix the checking of valid device Thread-Topic: [PATCHv2 17/25] PCI: mobiveil: fix the checking of valid device Thread-Index: AQHUgLM9hHaOWmproUOdCVfdWcYZ2aVYhj8Q Date: Tue, 20 Nov 2018 11:26:13 +0000 Message-ID: References: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com> <20181120092615.11680-18-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181120092615.11680-18-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=minghuan.lian@nxp.com; x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;HE1PR0401MB2507;6:sEEyQpNAubkqT/d4l96qWT1Rltr6Cldy5Eyvgd1piutiNDpx1897GE11u0a6445HiLxhWYT3Qaru0InnY7jitON0gqZHcBw6QosLmUYa9w3m1LIkfzMxXbYx2sJxKcXm9WLFmi4NKorjV+ohzlW1cYo8UevJoEJePFesI/tqnzjMPh2h5O9oOpvNyEZngLRs0UMtr1jtQCPU9Z6OXTRiuAO9YZyP5Ln8cmk8Bu7ce8pRuYE/1YKe7dVtHB6vnLlKfZSdOEx/5Bb3flT/murspFdUO2rgptj7v/Y9+dX9Sf4+4M34kbDqm5b0YM07GDjTNT8QFck1pLHf0FhUPwFjwzJ0MgNFHUCAzuX5OK7s2u8m1GT+GsWdMFsIWtLA9t/H7WLEUZTK61yBksGH7vu8MymO7HaOfZ6S8d+wzRRai4nN8Oa5RlaZs/I4WyOMNO7Yb/Vok5e+IrMTDbqBbwWIOA==;5:cjUkp+ugHn6YWCeDe8vt3gfne9HyP9p9ME336Im6LgNwAEO+/4kl7YSfky9QWGt/6SUiUUYC2uJVMVYQKllPn3txbvlzIYG2OmpddVvegrSxsXOYc4kLsKpF85XtnNR9FG3YWkrjDFVhUliOazgrRMunf/vw01TCHdpOIq/v2kU=;7:PL+FTBPQ6zcoUYIVVh/oxSYJi6hYiV+iIJNTkb58NOnI3hKXGhYgfYWwfaKFbWnTYlfKvRqzy9PnpJqKfzFS6OMy5jGqVFBEE59LbJeIIS11Ss+VB+ez1jjVNcpnv8t2ZvHWgB8Arqt90inp6qbSfg== x-ms-exchange-antispam-srfa-diagnostics: SOS; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 84e48871-a321-4040-7972-08d64edafa87 X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Nov 2018 11:26:13.0648 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0401MB2507 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org reviewed-by: Minghuan Lian > -----Original Message----- > From: Z.q. Hou > Sent: Tuesday, November 20, 2018 5:27 PM > To: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com; > l.subrahmanya@mobiveil.co.in; shawnguo@kernel.org; Leo Li > ; lorenzo.pieralisi@arm.com; > catalin.marinas@arm.com; will.deacon@arm.com > Cc: Mingkai Hu ; M.h. Lian > ; Xiaowei Bao ; Z.q. Hou > > Subject: [PATCHv2 17/25] PCI: mobiveil: fix the checking of valid device >=20 > From: Hou Zhiqiang >=20 > Avoid to issue CFG transactions to link partner when the PCIe link is not= up. > And allow CFG transactions to all functions of Endpoint implemented > multiple functions. >=20 > Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP dri= ver") > Signed-off-by: Hou Zhiqiang > --- > V2: > - New patch >=20 > drivers/pci/controller/mobiveil/pcie-mobiveil-host.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > index dc5324d94466..1ae82e790562 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > @@ -29,6 +29,10 @@ static bool mobiveil_pcie_valid_device(struct pci_bus > *bus, unsigned int devfn) { > struct mobiveil_pcie *pcie =3D bus->sysdata; >=20 > + /* If there is no link, then there is no device */ > + if (bus->number > pcie->rp.root_bus_nr > && !mobiveil_pcie_link_up(pcie)) > + return false; > + > /* Only one device down on each root port */ > if ((bus->number =3D=3D pcie->rp.root_bus_nr) && (devfn > 0)) > return false; > @@ -37,7 +41,7 @@ static bool mobiveil_pcie_valid_device(struct pci_bus > *bus, unsigned int devfn) > * Do not read more than one device on the bus directly > * attached to RC > */ > - if ((bus->primary =3D=3D pcie->rp.root_bus_nr) && (devfn > 0)) > + if ((bus->primary =3D=3D pcie->rp.root_bus_nr) && (PCI_SLOT(devfn) > 0)= ) > return false; >=20 > return true; > -- > 2.17.1