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[209.132.180.67]) by mx.google.com with ESMTP id u3si40340776pgj.300.2018.11.20.09.17.31; Tue, 20 Nov 2018 09:17:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729211AbeKUDq0 (ORCPT + 99 others); Tue, 20 Nov 2018 22:46:26 -0500 Received: from mail.bootlin.com ([62.4.15.54]:48031 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726975AbeKUDq0 (ORCPT ); Tue, 20 Nov 2018 22:46:26 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 073EC20745; Tue, 20 Nov 2018 18:16:13 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost (242.171.71.37.rev.sfr.net [37.71.171.242]) by mail.bootlin.com (Postfix) with ESMTPSA id D13AD2037D; Tue, 20 Nov 2018 18:16:12 +0100 (CET) Date: Tue, 20 Nov 2018 18:16:12 +0100 From: Alexandre Belloni To: Romain Izard Cc: Nicolas Ferre , Tudor Ambarus , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: at91: sama5d2: use the divided clock for SMC Message-ID: <20181120171612.GF8367@piout.net> References: <20181120165737.4998-1-romain.izard.pro@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181120165737.4998-1-romain.izard.pro@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Romain, On 20/11/2018 17:57:37+0100, Romain Izard wrote: > The SAMA5D2 is different from SAMA5D3 and SAMA5D4, as there are two > different clocks for the peripherals in the SoC. The Static Memory > controller is connected to the divided master clock. > > Unfortunately, the device tree does not correctly show this and uses the > master clock directly. This clock is then used by the code for the NAND > controller to calculate the timings for the controller, and we end up with > slow NAND Flash access. > > Fix the device tree, and the performance of Flash access is improved. > > Signed-off-by: Romain Izard > --- > arch/arm/boot/dts/sama5d2.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi > index 61f68e5c48e9..b405992eb601 100644 > --- a/arch/arm/boot/dts/sama5d2.dtsi > +++ b/arch/arm/boot/dts/sama5d2.dtsi > @@ -308,7 +308,7 @@ > 0x1 0x0 0x60000000 0x10000000 > 0x2 0x0 0x70000000 0x10000000 > 0x3 0x0 0x80000000 0x10000000>; > - clocks = <&mck>; > + clocks = <&h32ck>; You will have to rebase on top of at91-dt. And if I'm not mistaken, this line should be: + clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>; > status = "disabled"; > > nand_controller: nand-controller { > -- > 2.17.1 > -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com