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From:   Jagan Teki <jagan@amarulasolutions.com>
Date:   Tue, 20 Nov 2018 21:49:45 +0530
Message-ID: <CAMty3ZDnMwtd1Q3ab518=PsCo2FGCjuvqV2t5SQE=F-6AejCcA@mail.gmail.com>
Subject: Re: [PATCH v2 01/12] drm/sun4i: sun6i_mipi_dsi: Compute burst mode
 loop N1 instruction delay
To:     Maxime Ripard <maxime.ripard@bootlin.com>
Cc:     Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
        Rob Herring <robh+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
        Icenowy Zheng <icenowy@aosc.io>,
        Jernej Skrabec <jernej.skrabec@siol.net>,
        Vasily Khoruzhick <anarsoul@gmail.com>,
        Thierry Reding <thierry.reding@gmail.com>,
        Mark Rutland <mark.rutland@arm.com>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        devicetree <devicetree@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        Michael Trimarchi <michael@amarulasolutions.com>,
        TL Lim <tllim@pine64.org>, linux-sunxi@googlegroups.com,
        linux-amarula@amarulasolutions.com
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On Tue, Nov 20, 2018 at 9:29 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Tue, Nov 20, 2018 at 07:06:30PM +0530, Jagan Teki wrote:
> > On Tue, Nov 20, 2018 at 6:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > >
> > > On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote:
> > > > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > > >
> > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote:
> > > > > > Loop N1 instruction delay for burst mode lcd panel are
> > > > > > computed as per BSP code.
> > > > > >
> > > > > > Reference code is available in BSP (from linux-sunxi
> > > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> > > > > >
> > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1=
> > > > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50;
> > > > > > => (((mode->htotal - mode->hdisplay) * 150) /
> > > > > >      ((mode->clock / 1000) * 8)) - 50;
> > > > > >
> > > > > > So use the similar computation for loop N1 delay.
> > > > > >
> > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > > >
> > > > > *why* are you doing this? What is it fixing? on which devices?
> > > >
> > > > You mentioned the separate function to compute the delay for all modes
> > > > [1], ie what I did. did I missing anything?
> > >
> > > You're missing that you are never explaining why that patch is needed
> > > in the first place. Or answering the question I asked a couple of
> > > lines above.
> >
> > OK.
> >
> > The instruction delay varies between video and burst mode. for burst
> > mode panels it is computed based on the panel clock along with
> > horizontal sync+porch timings.
>
> You're still stating a fact. What issue, that you experienced, are you
> trying to solve here?

This change is specific for burst mode instruction delay. for
non-burst it is 50 - 1 and for burst mode it is computed as mentioned
in commit message. Both things are available in BSP code. and without
this burst mode panels not working with existing (50 - 1)