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[209.132.180.67]) by mx.google.com with ESMTP id ca6si10420994plb.141.2018.11.20.13.10.14; Tue, 20 Nov 2018 13:10:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727431AbeKUHLw (ORCPT + 99 others); Wed, 21 Nov 2018 02:11:52 -0500 Received: from mail.bootlin.com ([62.4.15.54]:54011 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725968AbeKUHLv (ORCPT ); Wed, 21 Nov 2018 02:11:51 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 2654D207B0; Tue, 20 Nov 2018 21:40:49 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost (unknown [88.191.26.124]) by mail.bootlin.com (Postfix) with ESMTPSA id F1C98206A1; Tue, 20 Nov 2018 21:40:48 +0100 (CET) Date: Tue, 20 Nov 2018 21:40:49 +0100 From: Alexandre Belloni To: Romain Izard Cc: Nicolas Ferre , Tudor Ambarus , Rob Herring , mark.rutland@arm.com, linux-arm-kernel , devicetree@vger.kernel.org, LKML Subject: Re: [PATCH] ARM: dts: at91: sama5d2: use the divided clock for SMC Message-ID: <20181120204049.GG8367@piout.net> References: <20181120165737.4998-1-romain.izard.pro@gmail.com> <20181120171612.GF8367@piout.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/11/2018 19:01:32+0100, Romain Izard wrote: > Le mar. 20 nov. 2018 ? 18:16, Alexandre Belloni > a ?crit : > > > > Hello Romain, > > > > On 20/11/2018 17:57:37+0100, Romain Izard wrote: > > > The SAMA5D2 is different from SAMA5D3 and SAMA5D4, as there are two > > > different clocks for the peripherals in the SoC. The Static Memory > > > controller is connected to the divided master clock. > > > > > > Unfortunately, the device tree does not correctly show this and uses the > > > master clock directly. This clock is then used by the code for the NAND > > > controller to calculate the timings for the controller, and we end up with > > > slow NAND Flash access. > > > > > > Fix the device tree, and the performance of Flash access is improved. > > > > > > Signed-off-by: Romain Izard > > > --- > > > arch/arm/boot/dts/sama5d2.dtsi | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi > > > index 61f68e5c48e9..b405992eb601 100644 > > > --- a/arch/arm/boot/dts/sama5d2.dtsi > > > +++ b/arch/arm/boot/dts/sama5d2.dtsi > > > @@ -308,7 +308,7 @@ > > > 0x1 0x0 0x60000000 0x10000000 > > > 0x2 0x0 0x70000000 0x10000000 > > > 0x3 0x0 0x80000000 0x10000000>; > > > - clocks = <&mck>; > > > + clocks = <&h32ck>; > > > > You will have to rebase on top of at91-dt. And if I'm not mistaken, this > > line should be: > > > > + clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>; > > > > > status = "disabled"; > > > > > > nand_controller: nand-controller { > > I guess you're right but this will only reach mainline in 4.21. I get slow > flash access with 4.19 as well... > Ok, this is super annoying, I'll try to get that as fixes on v4.20 and I'll rebase at91-dt on top of that... -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com