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From:   Leonard Crestez <leonard.crestez@nxp.com>
To:     "stefan@agner.ch" <stefan@agner.ch>,
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        "l.stach@pengutronix.de" <l.stach@pengutronix.de>,
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Subject: Re: [PATCH v3 2/2] PCI: imx6: limit DBI register length
Thread-Topic: [PATCH v3 2/2] PCI: imx6: limit DBI register length
Thread-Index: AQHUgPIBCDcLlZpcCkW2XhKPKNSgDg==
Date:   Wed, 21 Nov 2018 13:47:05 +0000
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On 11/20/2018 11:28 PM, Trent Piepho wrote:=0A=
> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:=0A=
>> On 20.11.2018 20:13, Trent Piepho wrote:=0A=
=0A=
>>> It also seems to me that this doesn't need to be in the internal pci=0A=
>>> config access functions.  The driver shouldn't be reading registers=0A=
>>> that don't exist anyway.  It's really about trying to fix sysfs access=
=0A=
>>> to registers that don't exist.  So maybe it should be done there.=0A=
>>=0A=
>> That was my first approach, see:=0A=
> =0A=
> Yes, but that just used the pci device id which applies to every IMX=0A=
> design.=0A=
> =0A=
> It's also not totally correct, as it seems real registers after 0x200=0A=
> do work on imx6, and that would prevent access to them.=0A=
=0A=
I see that Lorenzo already accepted the patch in pci/dwc:=0A=
=0A=
https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/commit/?=
h=3Dpci/dwc&id=3Df14eaec153aaebbe940ddd21e4198cc2abc927c2=0A=
=0A=
My tests show that this series breaks pci cards on 6qdl and I think it =0A=
should be reverted until a fix is found. Are you OK with this?=0A=
=0A=
Fixing might require an entirely different approach.=0A=