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Added flag spi-rx-bus-width and spi-tx-bus-width with values as 8 and 8 respectively for both flashes connected at CS0 and CS1. Signed-off-by: Yogesh Gaur --- Changes for v4: - None Changes for v3: - None Changes for v2: - None arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64= /boot/dts/freescale/fsl-lx2160a-rdb.dts index 3b20c97..24cc41c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -45,6 +45,8 @@ m25p,fast-read; spi-max-frequency =3D <20000000>; reg =3D <0>; + spi-rx-bus-width =3D <8>; + spi-tx-bus-width =3D <8>; }; =20 mt35xu512aba1: flash@1 { @@ -54,6 +56,8 @@ m25p,fast-read; spi-max-frequency =3D <20000000>; reg =3D <1>; + spi-rx-bus-width =3D <8>; + spi-tx-bus-width =3D <8>; }; }; =20 --=20 2.7.4