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[209.85.219.179]) by smtp.gmail.com with ESMTPSA id a71sm10053317ywe.66.2018.11.23.01.27.52 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 01:27:53 -0800 (PST) Received: by mail-yb1-f179.google.com with SMTP id z2-v6so4520873ybj.2 for ; Fri, 23 Nov 2018 01:27:52 -0800 (PST) X-Received: by 2002:a25:7ec4:: with SMTP id z187-v6mr14615973ybc.373.1542964938799; Fri, 23 Nov 2018 01:22:18 -0800 (PST) MIME-Version: 1.0 References: <20181116112430.31248-1-vivek.gautam@codeaurora.org> <20181116112430.31248-6-vivek.gautam@codeaurora.org> <20181121173803.GB9801@arm.com> In-Reply-To: From: Tomasz Figa Date: Fri, 23 Nov 2018 18:22:06 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for qcom,smmu-v2 variant To: Vivek Gautam , Will Deacon Cc: Rob Herring , thor.thayer@linux.intel.com, Mark Rutland , devicetree@vger.kernel.org, Alex Williamson , Linux PM , sboyd@kernel.org, freedreno , "Rafael J. Wysocki" , Linux Kernel Mailing List , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , linux-arm-msm , Robin Murphy , jcrouse@codeaurora.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Vivek, Will, On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam wrote: > > Hi Will, > > On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote: > > > > [+Thor] > > > > On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote: > > > qcom,smmu-v2 is an arm,smmu-v2 implementation with specific > > > clock and power requirements. > > > On msm8996, multiple cores, viz. mdss, video, etc. use this > > > smmu. On sdm845, this smmu is used with gpu. > > > Add bindings for the same. > > > > > > Signed-off-by: Vivek Gautam > > > Reviewed-by: Rob Herring > > > Reviewed-by: Tomasz Figa > > > Tested-by: Srinivas Kandagatla > > > Reviewed-by: Robin Murphy > > > --- > > > drivers/iommu/arm-smmu.c | 13 +++++++++++++ > > > 1 file changed, 13 insertions(+) > > > > > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c > > > index 2098c3141f5f..d315ca637097 100644 > > > --- a/drivers/iommu/arm-smmu.c > > > +++ b/drivers/iommu/arm-smmu.c > > > @@ -120,6 +120,7 @@ enum arm_smmu_implementation { > > > GENERIC_SMMU, > > > ARM_MMU500, > > > CAVIUM_SMMUV2, > > > + QCOM_SMMUV2, > > > }; > > > > > > struct arm_smmu_s2cr { > > > @@ -2026,6 +2027,17 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); > > > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); > > > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); > > > > > > +static const char * const qcom_smmuv2_clks[] = { > > > + "bus", "iface", > > > +}; > > > + > > > +static const struct arm_smmu_match_data qcom_smmuv2 = { > > > + .version = ARM_SMMU_V2, > > > + .model = QCOM_SMMUV2, > > > + .clks = qcom_smmuv2_clks, > > > + .num_clks = ARRAY_SIZE(qcom_smmuv2_clks), > > > +}; > > > > These seems redundant if we go down the route proposed by Thor, where we > > just pull all of the clocks out of the device-tree. In which case, why > > do we need this match_data at all? > > Which is better? Driver relying solely on the device tree to tell > which all clocks > are required to be enabled, > or, the driver deciding itself based on the platform's match data, > that it should > have X, Y, & Z clocks that should be supplied from the device tree. The former would simplify the driver, but would also make it impossible to spot mistakes in DT, which would ultimately surface out as very hard to debug bugs (likely complete system lockups). For qcom_smmuv2, I believe we're eventually going to end up with platform-specific quirks anyway, so specifying the clocks too wouldn't hurt. Given that, I'd recommend sticking to the latter, i.e. what this patch does. Best regards, Tomasz