Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3234301imu; Sat, 24 Nov 2018 00:43:28 -0800 (PST) X-Google-Smtp-Source: AFSGD/XWFWlq/zko/KzVTnNxOzw0uiQc/NaXXjKsG5JlFpJgiZrVSDYM6fHhRmbB3a2XbQQUm7mB X-Received: by 2002:a63:da14:: with SMTP id c20mr16552443pgh.233.1543049008057; Sat, 24 Nov 2018 00:43:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543049008; cv=none; d=google.com; s=arc-20160816; b=SEwgKn+Jphh6t5jeNWLGXaUqYMQAKk3wlhrtqJ6hAR4ATmyFWST/vBHu5y4cHqFif8 xsRGJ+fQ4P2xKXkGTwaL+o0yBuHFQ+GnvuJY4pY/gKlkiIV5D19lhNgBsCabW2sTM52P sn+kE+rPyetf2Lvw1SMJqeK33ZG09JfEsJV9OM5SXSfwzrwwOywkVGnx28lz2O8F4FgQ wPAZpNmGaZ8YUExohjRR89OpVGQbmOn2Q/xuml7akWlp4IqGSJPXEn2FPDgubfcX2oGM kZgdHTMrFEkX6qIeZtwE/Js6sB40hvWEzKva3fK/0ssuVLtc7sT8F/HTG1l5UVEpQg7r BRTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=njYeqDDbg5AAaHGN2elkTIQJ/u/swb0L5JwBEpvAb7w=; b=TM6Gmm4p5GrfJVu3mmYL0KMD+UnjaWc4Z0g1CNgV6w6nCkBc6qFQk5wjt+Zz32Bpwp lSolhn1uJPQ1G69qEtwmIm17DrXkDrnhjtN242LfMwK4hYlER4szlLt/aLQyiiysbUeo 6z0tv4wy1exMGMIBQF5ZNb+Ie/gLma5MvxBBa7PWzRBScPoe6G1+Uf8HQUfUWvr4Fe2Q fLfIRZebGs/KEpd44P/KBath8gu+ji/jo8lwy8SarsSyvOHTEPDM0WuRKsGGqX10Ib+o 8tIAkoJL2hzo0pEi02+jFpvxyrcANmtjJiRts4VWwatMVmev1fYott7LicZmhLOnRxCr 5FMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m68-v6si24640752pfm.78.2018.11.24.00.43.13; Sat, 24 Nov 2018 00:43:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2633027AbeKXDda (ORCPT + 99 others); Fri, 23 Nov 2018 22:33:30 -0500 Received: from muru.com ([72.249.23.125]:54862 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729195AbeKXDd3 (ORCPT ); Fri, 23 Nov 2018 22:33:29 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id D1D7380D4; Fri, 23 Nov 2018 16:48:31 +0000 (UTC) Date: Fri, 23 Nov 2018 08:48:27 -0800 From: Tony Lindgren To: Jon Hunter Cc: Peter Ujfalusi , Belisko Marek , LKML , linux-omap@vger.kernel.org, "Dr. H. Nikolaus Schaller" , Laxman Dewangan , Thierry Reding Subject: Re: omap5 fixing palmas IRQ_TYPE_NONE warning leads to gpadc timeouts Message-ID: <20181123164827.GE53235@atomide.com> References: <20180703084516.GT112168@atomide.com> <20181113180656.GE53235@atomide.com> <46d271b2-35d3-6353-c530-3292cdac53ab@ti.com> <20181119161906.GP53235@atomide.com> <20181119171406.GQ53235@atomide.com> <725df8e7-4aff-3751-d0b0-809b89e882e5@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <725df8e7-4aff-3751-d0b0-809b89e882e5@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Jon Hunter [181120 11:14]: > On 19/11/2018 17:14, Tony Lindgren wrote: > > Well so commit 7e9d474954f4 ("ARM: tegra: Correct polarity for > > Tegra114 PMIC interrupt") states that tegra114 inverts the > > polarity of the PMIC interrupt. So adding Jon and Thierry to Cc. > > Yes Tegra can invert the polarity of the PMIC interrupt. So is there some IP on Tegra called "Tegra PMC" that is inverting the interrupt? Or is the "Tegra PMC" that commit 7e9d474954f4 mentions just the palmas configuration for inverting the interrupt? The problem I'm having is With omap5 where I can only get the PMIC interrupts working with IRQ_TYPE_LEVEL_HIGH if PALMAS_POLARITY_CTRL_INT_POLARITY is not set unlike for Tegra. Regards, Tony