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[209.85.161.42]) by smtp.gmail.com with ESMTPSA id k125-v6sm14520727ywd.102.2018.11.25.20.02.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 25 Nov 2018 20:02:34 -0800 (PST) Received: by mail-yw1-f42.google.com with SMTP id h138-v6so5185151ywa.11 for ; Sun, 25 Nov 2018 20:02:33 -0800 (PST) X-Received: by 2002:a81:ae19:: with SMTP id m25mr27424287ywh.342.1543204953454; Sun, 25 Nov 2018 20:02:33 -0800 (PST) MIME-Version: 1.0 References: <20181116112430.31248-1-vivek.gautam@codeaurora.org> <20181116112430.31248-6-vivek.gautam@codeaurora.org> <20181121173803.GB9801@arm.com> <20181123183428.GD21183@arm.com> In-Reply-To: <20181123183428.GD21183@arm.com> From: Tomasz Figa Date: Mon, 26 Nov 2018 13:02:22 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RESEND PATCH v17 5/5] iommu/arm-smmu: Add support for qcom,smmu-v2 variant To: Will Deacon Cc: Vivek Gautam , thor.thayer@linux.intel.com, Mark Rutland , devicetree@vger.kernel.org, Linux PM , sboyd@kernel.org, linux-arm-msm , "Rafael J. Wysocki" , Linux Kernel Mailing List , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Alex Williamson , Rob Herring , freedreno , Robin Murphy Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Nov 24, 2018 at 3:34 AM Will Deacon wrote: > > On Fri, Nov 23, 2018 at 03:06:29PM +0530, Vivek Gautam wrote: > > On Fri, Nov 23, 2018 at 2:52 PM Tomasz Figa wrote: > > > On Fri, Nov 23, 2018 at 6:13 PM Vivek Gautam > > > wrote: > > > > On Wed, Nov 21, 2018 at 11:09 PM Will Deacon wrote: > > > > > On Fri, Nov 16, 2018 at 04:54:30PM +0530, Vivek Gautam wrote: > > > > > > @@ -2026,6 +2027,17 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU); > > > > > > ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500); > > > > > > ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2); > > > > > > > > > > > > +static const char * const qcom_smmuv2_clks[] = { > > > > > > + "bus", "iface", > > > > > > +}; > > > > > > + > > > > > > +static const struct arm_smmu_match_data qcom_smmuv2 = { > > > > > > + .version = ARM_SMMU_V2, > > > > > > + .model = QCOM_SMMUV2, > > > > > > + .clks = qcom_smmuv2_clks, > > > > > > + .num_clks = ARRAY_SIZE(qcom_smmuv2_clks), > > > > > > +}; > > > > > > > > > > These seems redundant if we go down the route proposed by Thor, where we > > > > > just pull all of the clocks out of the device-tree. In which case, why > > > > > do we need this match_data at all? > > > > > > > > Which is better? Driver relying solely on the device tree to tell > > > > which all clocks > > > > are required to be enabled, > > > > or, the driver deciding itself based on the platform's match data, > > > > that it should > > > > have X, Y, & Z clocks that should be supplied from the device tree. > > > > > > The former would simplify the driver, but would also make it > > > impossible to spot mistakes in DT, which would ultimately surface out > > > as very hard to debug bugs (likely complete system lockups). > > > > Thanks. > > Yea, this is how I understand things presently. Relying on device tree > > puts the things out of driver's control. > > But it also has the undesirable effect of having to update the driver > code whenever we want to add support for a new SMMU implementation. If > we do this all in the DT, as Thor is trying to do, then older kernels > will work well with new hardware. Fair enough, if you're okay with that. Obviously one would still have to change the DT bindings to list the exact set of clocks for the new hardware variant, unless the convention changed recently. Best regards, Tomasz