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From:   Vincent Guittot <vincent.guittot@linaro.org>
Date:   Mon, 26 Nov 2018 12:37:00 +0100
Message-ID: <CAKfTPtDm49JS7thuUn0--ocqpn2Du4qi8qsUeeHzGrAG_F2epw@mail.gmail.com>
Subject: Re: [Question] atomic_fetch_andnot() in nohz_idle_balance()
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     andrea.parri@amarulasolutions.com, Ingo Molnar <mingo@redhat.com>,
        linux-kernel <linux-kernel@vger.kernel.org>
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On Mon, 26 Nov 2018 at 10:30, Peter Zijlstra <peterz@infradead.org> wrote:
>
> On Wed, Nov 21, 2018 at 11:34:53PM +0100, Andrea Parri wrote:
> > Hi,
> >
> > The comment for the atomic_fetch_andnot() in nohz_idle_balance() says:
> >
> >   "barrier, pairs with nohz_balance_enter_idle(), ensures ..."
> >
> > which, well, does sound a note of warning... ;-)
> >
> > I see that nohz_balance_enter_idle() has an smp_mb__after_atomic() but
> > the comment for the latter suggests that this barrier is pairing with
> > the smp_mb() in _nohz_idle_balance().
> >
> > So, what is the intended pairing barrier for the atomic_fetch_andnot()?
> > what (which memory accesses) do you want "to order" here?
>
> I can't seem to make sense of that comment either; the best I can come
> up with is that it would order the prior NOHZ_KICK_MASK load vs us then
> changing it.
>
> But that would order against kick_ilb(), not enter_idle.
>
> Vincent?

I can't come with a good explanation.
After looking into my email archive, the only explanation that i have
is that the comments remains from a previous iteration of the feature
that was based on a nohz.stats_state mechanism