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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id x4sm189513otk.37.2018.11.26.08.12.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Nov 2018 08:12:42 -0800 (PST) Date: Mon, 26 Nov 2018 10:12:42 -0600 From: Rob Herring To: Andrea Merello Cc: vkoul@kernel.org, dan.j.williams@intel.com, michal.simek@xilinx.com, appana.durga.rao@xilinx.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, radhey.shyam.pandey@xilinx.com Subject: Re: [PATCH v6 3/7] dt-bindings: dmaengine: xilinx_dma: add optional xlnx,sg-length-width property Message-ID: <20181126161242.GA19168@bogus> References: <20181120153151.18024-1-andrea.merello@gmail.com> <20181120153151.18024-3-andrea.merello@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181120153151.18024-3-andrea.merello@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 20, 2018 at 04:31:47PM +0100, Andrea Merello wrote: > The width of the "length register" cannot be autodetected, and it is now > specified with a DT property. Add documentation for it. > > Cc: Rob Herring > Cc: Mark Rutland > Cc: devicetree@vger.kernel.org > Cc: Radhey Shyam Pandey > Signed-off-by: Andrea Merello > Reviewed-by: Radhey Shyam Pandey > --- > Changes in v2: > - change property name > - property is now optional > - cc DT maintainer > Changes in v3: > - reword > - cc DT maintainerS and ML > Changes in v4: > - specify the unit, the valid range and the default value > Changes in v5: > - commit message trivial fix > - fix spaces before tab > Changes in v6: > None > --- > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 4 ++++ > 1 file changed, 4 insertions(+) Please add acks/reviewed-bys when posting new versions.