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Subject: Re: [PATCH] i3c: master: dw: split dw-i3c-master.c into master and
 bus specific parts
To:     Boris Brezillon <boris.brezillon@bootlin.com>,
        vitor <vitor.soares@synopsys.com>
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From:   vitor <vitor.soares@synopsys.com>
Message-ID: <b7f59793-aaaa-95ff-fe7d-943e558f65b5@synopsys.com>
Date:   Mon, 26 Nov 2018 19:28:02 +0000
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On 26/11/18 19:08, Boris Brezillon wrote:
> On Mon, 26 Nov 2018 19:56:18 +0100
> Boris Brezillon <boris.brezillon@bootlin.com> wrote:
>   
>>>       - for the others it will easy the SoC integration avoiding
>>> duplicated work and doing things from scratch.
>> What would be duplicated? You want to support a new SoC, just add a new
>> entry in the of_match_table and you're done. When you need to add
>> SoC/integration specific stuff, create a struct and attach a different
>> instance per-compatible so that each SoC can have its own configuration
>> (or even init sequence if needed). That's how we do for pretty much all
>> IPs out there, why should designware ones be different?
> To be more specific, I'd like a real example that shows why the
> separation is needed.

Ok no problem. We can delay this for PCI and other rules support.