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[209.132.180.67]) by mx.google.com with ESMTP id e8si6788369pfc.248.2018.11.28.01.20.27; Wed, 28 Nov 2018 01:20:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727883AbeK1UUw (ORCPT + 99 others); Wed, 28 Nov 2018 15:20:52 -0500 Received: from mail.bootlin.com ([62.4.15.54]:42770 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727413AbeK1UUw (ORCPT ); Wed, 28 Nov 2018 15:20:52 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 6F16B207AD; Wed, 28 Nov 2018 10:19:53 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost (242.171.71.37.rev.sfr.net [37.71.171.242]) by mail.bootlin.com (Postfix) with ESMTPSA id 474542039F; Wed, 28 Nov 2018 10:19:43 +0100 (CET) Date: Wed, 28 Nov 2018 10:19:43 +0100 From: Alexandre Belloni To: Anson Huang Cc: Lothar =?iso-8859-1?Q?Wa=DFmann?= , "a.zummo@towertech.it" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Aisheng DONG , Andy Gross , "arnd@arndb.de" , "horms+renesas@verge.net.au" , "heiko@sntech.de" , "bjorn.andersson@linaro.org" , "enric.balletbo@collabora.com" , "amit.kucheria@linaro.org" , "ezequiel@collabora.com" , "olof@lixom.net" , "shawnguo@kernel.org" , "linux-rtc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , dl-linux-imx Subject: Re: [PATCH 4/4] ARM64: dts: imx: add i.MX8QXP system controller RTC support Message-ID: <20181128091943.GB8952@piout.net> References: <1543311334-8807-1-git-send-email-Anson.Huang@nxp.com> <1543311334-8807-5-git-send-email-Anson.Huang@nxp.com> <20181128100420.0c9a721a@karo-electronics.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/11/2018 09:06:27+0000, Anson Huang wrote: > > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > index 9155d45..ef57db6 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > > > @@ -433,4 +433,8 @@ > > > #size-cells = <1>; > > > ranges = <0x5f000000 0x0 0x5f000000 0x1000000>; > > > }; > > > + > > > + rtc: rtc { > > > + compatible = "nxp,imx8qxp-sc-rtc"; > > > + }; > > > }; > > IMO this should be disabled by default. > > This module is NOT depending on any board design, should it be enabled by default in soc dtsi? > Like wdog etc.. > I guess the point is that you may not want it enabled, even if it should always be working. enabling it by default would affect the RTC ordering for example. -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com