Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1111165imu; Wed, 28 Nov 2018 04:55:01 -0800 (PST) X-Google-Smtp-Source: AFSGD/VCrnTjm3p2CbSBMwLlutQWdbefY+OFCR0BkPWSJHR6wbsc0yLbvwssRFat2E5ZCnN+n7di X-Received: by 2002:a62:2547:: with SMTP id l68mr14464600pfl.131.1543409701258; Wed, 28 Nov 2018 04:55:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543409701; cv=none; d=google.com; s=arc-20160816; b=eCSsNvS1gl9aSgbfhXmNx9r/jNhYomWDgjB5gv1gEvKVwy+OI2WdnpOsxCHIeqeZMJ +W31aukHoTKOlx8GdfOos7TOwnSA7/pdw+z4C23/HR1gkGXmyDQlE3ikkfRHI9m6QDlk K/o9aPA6v1Hiqq+5cx4+kWSFlOJyjSSsriWQiodKHLwu1GmOxwHf+13UPvzqaLMUSCdi jYJJlcWzgfYps73EUw9UqSmmVyk/NpM7LIkhtVAteVswDsm+DwBeecPHktcgpDedoM00 SoB2ZMkvGRkhHEEFMyd1XhcMY4P6lk7zBzwriXJEHlSC9zNGJReT8RX3XxtmBx/7M/5u EC5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=JIr+OJMHFlQdJl5VrS0vdNm57vpsMppd0mr/wJHIQPg=; b=qgZk6mqWsa2QMwAh60rzJEAfbvPEM3yTBN3+D2i/q8OCw57pDHmF1ewVDALFeifCGw TOnzglPPPKgb1xN7gU5o16oqLcEvVtxWLi1Qrw64a26LUJBhHZSO2V1g+qRvKFNpv7Di 7sFChsbZLFhnpIDwUh/49NrRsbAAQGfnJPBZJGqAniz6a8+pXD57+Bac2dHP+k11Jcv7 LIuFFRKwu27o9MBJGKZhFlTrGFKQv7n658NOtZx4slG0etIE5uyqCurtKID/uVh+1e/2 wjTzN4g+6btcMnTFlx7dKgEwkFl/fOfjBG0nXHl3F0/aN5Zulb6l7pg1AaIJHPgiRj9b Qmvw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i20si6677769pgm.586.2018.11.28.04.54.41; Wed, 28 Nov 2018 04:55:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728102AbeK1Xzi (ORCPT + 99 others); Wed, 28 Nov 2018 18:55:38 -0500 Received: from mail.bootlin.com ([62.4.15.54]:56672 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727811AbeK1Xzi (ORCPT ); Wed, 28 Nov 2018 18:55:38 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id DF3F3209A7; Wed, 28 Nov 2018 13:54:01 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.2 Received: from bbrezillon (aaubervilliers-681-1-94-205.w90-88.abo.wanadoo.fr [90.88.35.205]) by mail.bootlin.com (Postfix) with ESMTPSA id 89991207BC; Wed, 28 Nov 2018 13:53:51 +0100 (CET) Date: Wed, 28 Nov 2018 13:53:51 +0100 From: Boris Brezillon To: Schrempf Frieder Cc: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= , Miquel Raynal , "richard@nod.at" , "dwmw2@infradead.org" , "computersforpeace@gmail.com" , "marek.vasut@gmail.com" , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" Subject: Re: [PATCH] mtd: nand: spi: Add initial support for Toshiba TC58CVG2S0H Message-ID: <20181128135351.488194ee@bbrezillon> In-Reply-To: <1655b66f-37e2-427f-a047-8305f86fc22c@kontron.de> References: <1541665796-21092-1-git-send-email-frieder.schrempf@kontron.de> <0fc1f198-0e87-01af-5a0e-3d21613c39f3@kontron.de> <1655b66f-37e2-427f-a047-8305f86fc22c@kontron.de> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 27 Nov 2018 16:41:56 +0000 Schrempf Frieder wrote: > >>> +static int tc58cvg2s0h_ooblayout_ecc(struct mtd_info *mtd, int section, > >>> + struct mtd_oob_region *region) > >>> +{ > >>> + if (section > 7) > >>> + return -ERANGE; > >>> + > >>> + region->offset = 128 + 16 * section; > >>> + region->length = 16; > > > > Here you expose the ECC bits has 8 sections of 16 bytes. > > But regarding the datasheet this should not be accessed page 32. > > "The ECC parity code generated by internal ECC is stored in column > > addresses 4224-4351 and the users cannot access to these specific > > addresses when internal ECC is enabled." 'when internal ECC is enabled' means that those bytes can be accessed when it's disabled. We should keep exposing the ECC byte sections. Note that even if ECC sections are not exposed, the core will read those bytes. They're probably filled with garbage in this case, but we don't care since we won't use them. > > This is just to let the other layers know, where the bytes used for ECC > are. As long as the driver uses the on-chip ECC it won't write to this > area. So this is correct unless I misunderstood this concept. All the > other supported SPI NAND chips use the same approach. Yes, and that's the right thing to do. We want to know where the ECC bytes are, especially when doing raw accesses. > > > > >>> + > >>> + > >>> + return 0; > >>> +} > >>> + > >>> +static int tc58cvg2s0h_ooblayout_free(struct mtd_info *mtd, int section, > >>> + struct mtd_oob_region *region) > >>> +{ > >>> + if (section > 7) > >>> + return -ERANGE; > >>> + > >>> + region->offset = 2 + 16 * section; > >>> + region->length = 14; > > > > This reserved 2 bytes for BBM for each section. > > But maybe we could declare this as 1 section of 128bytes: > > > > if (section) > > return -ERANGE; > > > > region->offset = 2; > > region->length = 126; I agree with this suggestion: if the free bytes are contiguous, it's better to expose them as a single section.