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 <CAD=FV=WJCvt-Ez_F+gTJaLWnOOY2J0fXxgq8vy0ojKoHv+AQ7w@mail.gmail.com> <6602824.AOVt5XvbUN@diego>
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From:   Doug Anderson <dianders@chromium.org>
Date:   Wed, 28 Nov 2018 09:04:46 -0800
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Subject: Re: [PATCH] arm64: dts: rockchip: Add 32k clk on rk3399-gru
To:     =?UTF-8?Q?Heiko_St=C3=BCbner?= <heiko@sntech.de>
Cc:     Derek Basehore <dbasehore@chromium.org>,
        LKML <linux-kernel@vger.kernel.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        devicetree@vger.kernel.org, Tony Xie <tony.xie@rock-chips.com>,
        Chris <zyw@rock-chips.com>, ayaka@soulik.info,
        "nickey.yang" <nickey.yang@rock-chips.com>,
        =?UTF-8?B?6YOR6Iic5Lm+?= <zhengsq@rock-chips.com>,
        Klaus Goger <klaus.goger@theobroma-systems.com>,
        Brian Norris <briannorris@chromium.org>,
        Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Rob Herring <robh+dt@kernel.org>
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Hi,

On Wed, Nov 28, 2018 at 5:46 AM Heiko St=C3=BCbner <heiko@sntech.de> wrote:
> > Possibly Heiko would re-sort this for you himself when applying the
> > change if he agrees with my understanding of the conventions.
>
> We hashed out the dt-conventions somewhat together during veyron
> times, so I'd be surprised if we didn't agree on them :-D .

You never know!  I make stupid mistakes all the time.


> In any case, I've adapted the commit message to add the Silego part,
> moved the clock to the correct position and applied the result with
> your Reviewed-by for 4.21.

Thank you much!

-Doug