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[209.132.180.67]) by mx.google.com with ESMTP id y2si7952615pgl.148.2018.11.28.09.56.24; Wed, 28 Nov 2018 09:56:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729352AbeK2E4T (ORCPT + 99 others); Wed, 28 Nov 2018 23:56:19 -0500 Received: from shell.v3.sk ([90.176.6.54]:39330 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728868AbeK2E4S (ORCPT ); Wed, 28 Nov 2018 23:56:18 -0500 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 189D799A17; Wed, 28 Nov 2018 18:53:46 +0100 (CET) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id 29Xke9XCB3Wx; Wed, 28 Nov 2018 18:53:30 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id CD80799A4A; Wed, 28 Nov 2018 18:53:29 +0100 (CET) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 1U4dFWeQEasq; Wed, 28 Nov 2018 18:53:28 +0100 (CET) Received: from belphegor.brq.redhat.com (nat-pool-brq-t.redhat.com [213.175.37.10]) by zimbra.v3.sk (Postfix) with ESMTPSA id 3B72299986; Wed, 28 Nov 2018 18:53:28 +0100 (CET) From: Lubomir Rintel To: arm@kernel.org, Olof Johansson , Arnd Bergmann Cc: Eric Miao , Haojian Zhuang , Russell King , Robert Jarzmik , Pavel Machek , James Cameron , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v4 01/20] dt-bindings: mrvl,mmp-timer: add clock Date: Wed, 28 Nov 2018 18:53:05 +0100 Message-Id: <20181128175324.163202-2-lkundrak@v3.sk> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181128175324.163202-1-lkundrak@v3.sk> References: <20181128175324.163202-1-lkundrak@v3.sk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The timer needs the timer clock to be enabled, otherwise it stops ticking. Signed-off-by: Lubomir Rintel Reviewed-by: Rob Herring Acked-by: Pavel Machek --- Changes since v1: - Made the clock optional, to keep compatibility with DTs without it Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt b= /Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt index 9a6e251462e7..b8f02c663521 100644 --- a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt +++ b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.txt @@ -5,9 +5,13 @@ Required properties: - reg : Address and length of the register set of timer controller. - interrupts : Should be the interrupt number. =20 +Optional properties: +- clocks : Should contain a single entry describing the clock input. + Example: timer0: timer@d4014000 { compatible =3D "mrvl,mmp-timer"; reg =3D <0xd4014000 0x100>; interrupts =3D <13>; + clocks =3D <&coreclk 2>; }; --=20 2.19.1