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From:   Lubomir Rintel <lkundrak@v3.sk>
To:     arm@kernel.org, Olof Johansson <olof@lixom.net>,
        Arnd Bergmann <arnd@arndb.de>
Cc:     Eric Miao <eric.y.miao@gmail.com>,
        Haojian Zhuang <haojian.zhuang@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        Robert Jarzmik <robert.jarzmik@free.fr>,
        Pavel Machek <pavel@ucw.cz>, James Cameron <quozl@laptop.org>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Lubomir Rintel <lkundrak@v3.sk>
Subject: [PATCH v4 10/20] DT: marvell,mmp2: Add SSP controllers
Date:   Wed, 28 Nov 2018 18:53:14 +0100
Message-Id: <20181128175324.163202-11-lkundrak@v3.sk>
In-Reply-To: <20181128175324.163202-1-lkundrak@v3.sk>
References: <20181128175324.163202-1-lkundrak@v3.sk>
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Despite Marvel keeps their base addresses secret there's a good chance
they're actually correct.

SSP1 and SSP3 bases were taken from OLPC 1.75: OpenFirmware and kernel
respectively. SSP2 and SSP4 addresses are from James Cameron who actually
has a copy of the data sheet.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>

---
Changes since v2:
- Added SSP2 and SSP4 (thanks James Cameron <quozl@laptop.org>)

Changes since v1:
- Dropped the aliases

 arch/arm/boot/dts/mmp2.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 0c5a51b98c3f..ee03e0846740 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -346,6 +346,38 @@
 				resets =3D <&soc_clocks MMP2_CLK_RTC>;
 				status =3D "disabled";
 			};
+
+			ssp1: ssp@d4035000 {
+				compatible =3D "marvell,mmp2-ssp";
+				reg =3D <0xd4035000 0x1000>;
+				clocks =3D <&soc_clocks MMP2_CLK_SSP0>;
+				interrupts =3D <0>;
+				status =3D "disabled";
+			};
+
+			ssp2: ssp@d4036000 {
+				compatible =3D "marvell,mmp2-ssp";
+				reg =3D <0xd4036000 0x1000>;
+				clocks =3D <&soc_clocks MMP2_CLK_SSP1>;
+				interrupts =3D <1>;
+				status =3D "disabled";
+			};
+
+			ssp3: ssp@d4037000 {
+				compatible =3D "marvell,mmp2-ssp";
+				reg =3D <0xd4037000 0x1000>;
+				clocks =3D <&soc_clocks MMP2_CLK_SSP2>;
+				interrupts =3D <20>;
+				status =3D "disabled";
+			};
+
+			ssp4: ssp@d4039000 {
+				compatible =3D "marvell,mmp2-ssp";
+				reg =3D <0xd4039000 0x1000>;
+				clocks =3D <&soc_clocks MMP2_CLK_SSP3>;
+				interrupts =3D <21>;
+				status =3D "disabled";
+			};
 		};
=20
 		soc_clocks: clocks{
--=20
2.19.1