Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp2635964imu; Thu, 29 Nov 2018 08:00:40 -0800 (PST) X-Google-Smtp-Source: AFSGD/U0jN7h3VVR8Cvs5eRYrBv34EaNzHC6c2gqW7wWu3U6oGWtX8hb5gcXqqXDYYg3SGygGOgP X-Received: by 2002:a62:546:: with SMTP id 67mr1860289pff.99.1543507240453; Thu, 29 Nov 2018 08:00:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543507240; cv=none; d=google.com; s=arc-20160816; b=DLefmfuQOndy18YSNBKOO4vY1CVwhSMYdrJrw5SrXtTzMpdC+hBsrCDwr/tHi1IiVI ieomRoP9M/1FpgrvqD44X07TuMjPCee3Lx8+ZR6MqefCt0zo1nic6MXFiMOpf5hFYuyM rBvli148cOFZ8mSe/CQ/b8Dw+fx3UQsTkXdWMHWK7UHOGCMVt+JDR+269KLokpmc9OXT QsGlRSVFmIVdAld510v926eogGLxJXNqoeSxB5xRhPX+R5++PBuLRvVKN6fPF6S9EWUb SCP6q+LQMGZwsWXYiQ7xm+LWhqvZCl6cLg6fX1q0tzjJsX3UYLSSOQzS3wko3SwWKY7T jAlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=VJsBUdnCIbycmvr4jCDO4dsbR7ZXx+mCN/TStUOZvD4=; b=aBUpDD/6ECbFA+vn+VUAko0YyuSQ4f/l4CKV3+rdkm8VhO2AMq6p2MvW0cg2EXuVNa KRC72KjwAxVAfBDNLqgJsIe7nnu0qdx/d3ud4k4GxodM/aaccf32ETPqgASZaef77nCp 6zQKZa2ktTi4E1jDWW90hkZ2yvN+XKbwJj/aLRz2vHGRHg6b9Y0J4vpDetiroWPSC/5X 3Je8urE3OpCBl3CAdJX8BOr1ndviRxj1+ckMxZXHi0pzKMT7uktdJkMuPXL/cz5qcOhN xtm/bSHC0HJhK/b31zB6xWf5DN7ylrXZ7xGMpvyLXyYixh7VxDd3Xgx/3ILCmwk+PWuV bVWA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u11si2348081pgo.474.2018.11.29.08.00.17; Thu, 29 Nov 2018 08:00:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729068AbeK3DDu (ORCPT + 99 others); Thu, 29 Nov 2018 22:03:50 -0500 Received: from verein.lst.de ([213.95.11.211]:44335 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728363AbeK3DDt (ORCPT ); Thu, 29 Nov 2018 22:03:49 -0500 Received: by newverein.lst.de (Postfix, from userid 2407) id C519168B02; Thu, 29 Nov 2018 16:57:58 +0100 (CET) Date: Thu, 29 Nov 2018 16:57:58 +0100 From: Christoph Hellwig To: Daniel Vetter Cc: "Clark, Rob" , Christoph Hellwig , Dave Airlie , linux-arm-msm , Linux Kernel Mailing List , dri-devel , Tomasz Figa , Sean Paul , vivek.gautam@codeaurora.org, freedreno , Robin Murphy Subject: Re: [PATCH v3 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg* Message-ID: <20181129155758.GC26537@lst.de> References: <20181129140315.28476-1-vivek.gautam@codeaurora.org> <20181129141429.GA22638@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 29, 2018 at 03:43:50PM +0100, Daniel Vetter wrote: > Yeah we had patches to add manual cache management code to drm, so we > don't have to abuse the dma streaming api anymore. Got shouted down. > Abusing the dma streaming api also gets shouted down. It's a gpu, any > idea of these drivers actually being platform independent is out of > the window from the start anyway, so we're ok with tying this to > platforms. Manual or not the iommu API is missing APIs for cache management, which makes it kinda surprising it actually ever worked for non-coherent devices. And fortunately while some people spent the last year ot two bickering about the situation others actually did work, and we now have a generic arch_sync_dma_for_device/arch_sync_dma_for_cpu kernel-internal API. This is only used for DMA API internals so far, and explicitly not intended for direct driver use, but it would be perfect as the backend for iommu API cache maintainance functions. It exists on all but two architectures on mainline. Out of those powerpc is in the works, only arm32 will need some major help.