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From:   Daniel Vetter <daniel@ffwll.ch>
Date:   Thu, 29 Nov 2018 18:09:05 +0100
Message-ID: <CAKMK7uECLeTbEjG6=unWZSKakpiYkmBVbCEKKY2xv=vVjF-pBQ@mail.gmail.com>
Subject: Re: [PATCH v3 1/1] drm: msm: Replace dma_map_sg with dma_sync_sg*
To:     Christoph Hellwig <hch@lst.de>
Cc:     "Clark, Rob" <robdclark@gmail.com>, Dave Airlie <airlied@linux.ie>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        Tomasz Figa <tfiga@chromium.org>,
        Sean Paul <seanpaul@chromium.org>, vivek.gautam@codeaurora.org,
        freedreno <freedreno@lists.freedesktop.org>,
        Robin Murphy <robin.murphy@arm.com>
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On Thu, Nov 29, 2018 at 5:57 PM Christoph Hellwig <hch@lst.de> wrote:
> On Thu, Nov 29, 2018 at 05:28:07PM +0100, Daniel Vetter wrote:
> > Just spend a bit of time reading through the implementations already
> > merged. Is the struct device *dev parameter actually needed anywhere?
> > dma-api definitely needs it, because we need that to pick the right iommu.
> > But for cache management from what I've seen the target device doesn't
> > matter, all the target specific stuff will be handled by the iommu.
>
> It looks like only mips every uses the dev argument, and even there
> the function it passes dev to ignores it.  So it could probably be removed.
>
> >
> > Dropping the dev parameter would make this a perfect fit for coherency
> > management of buffers used by multiple devices. Right now there's all
> > kinds of nasty tricks for that use cases needed to avoid redundant
> > flushes.
>
> Note that one thing I'd like to avoid is exposing these funtions directly
> to drivers, as that will get us into all kinds of abuses.

What kind of abuse do you expect? It could very well be that gpu folks
call that "standard use case" ... At least on x86 with the i915 driver
we pretty much rely on architectural guarantees for how cache flushes
work very much. Down to userspace doing the cache flushing for
mappings the kernel has set up.

> So I'd much prefer if we could have iommu APIs wrapping these that are
> specific to actual uses cases that we understand well.
>
> As for the buffer sharing: at least for the DMA API side I want to
> move the current buffer sharing users away from dma_alloc_coherent
> (and coherent dma_alloc_attrs users) and the remapping done in there
> required for non-coherent architectures.  Instead I'd like to allocate
> plain old pages, and then just dma map them for each device separately,
> with DMA_ATTR_SKIP_CPU_SYNC passed for all but the first user to map
> or last user to unmap.  On the iommu side it could probably work
> similar.

I think this is what's often done. Except then there's also the issue
of how to get at the cma allocator if your device needs something
contiguous. There's a lot of that still going on in graphics/media.
-Daniel

> I have done some preliminary work on this, and want to get it into this
> merge window, but there is a few other bits I need to sort out first.
>
> > -Daniel
> > --
> > Daniel Vetter
> > Software Engineer, Intel Corporation
> > http://blog.ffwll.ch
> ---end quoted text---
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch