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Sun, 02 Dec 2018 11:47:20 -0800 (PST) Received: from ziggy.stardust ([93.176.147.153]) by smtp.gmail.com with ESMTPSA id n16-v6sm1828026eja.6.2018.12.02.11.47.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 11:47:20 -0800 (PST) Subject: Re: [PATCH v27 1/2] arm64: dts: mt8173: Add GCE node To: Houlong Wei Cc: Jassi Brar , Rob Herring , Daniel Kurtz , Sascha Hauer , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, Sascha Hauer , Philipp Zabel , Nicolas Boichat , CK HU , Bibby Hsieh , YT Shen , Daoyuan Huang , Jiaguang Zhang , Dennis-YC Hsieh , Monica Wang , HS Liao , ginny.chen@mediatek.com, enzhu.wang@mediatek.com, kendrick.hsu@mediatek.com References: <1543462629-32746-1-git-send-email-houlong.wei@mediatek.com> <1543462629-32746-2-git-send-email-houlong.wei@mediatek.com> From: Matthias Brugger Openpgp: preference=signencrypt Autocrypt: addr=matthias.bgg@gmail.com; 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Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 MIME-Version: 1.0 In-Reply-To: <1543462629-32746-2-git-send-email-houlong.wei@mediatek.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/11/2018 04:37, Houlong Wei wrote: > This patch adds the device node of the GCE hardware for CMDQ module. > > Signed-off-by: Houlong Wei > Signed-off-by: HS Liao > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index abd2f15..412ffd4 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi Applied to v4.20-next/dts64 Thanks a lot, it was a long journey :) > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include "mt8173-pinfunc.h" > > / { > @@ -521,6 +522,15 @@ > status = "disabled"; > }; > > + gce: mailbox@10212000 { > + compatible = "mediatek,mt8173-gce"; > + reg = <0 0x10212000 0 0x1000>; > + interrupts = ; > + clocks = <&infracfg CLK_INFRA_GCE>; > + clock-names = "gce"; > + #mbox-cells = <3>; > + }; > + > mipi_tx0: mipi-dphy@10215000 { > compatible = "mediatek,mt8173-mipi-tx"; > reg = <0 0x10215000 0 0x1000>; >