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From:   Michael Kelley <mikelley@microsoft.com>
To:     Will Deacon <will.deacon@arm.com>,
        Greg KH <gregkh@linuxfoundation.org>
CC:     KY Srinivasan <kys@microsoft.com>,
        "catalin.marinas@arm.com" <catalin.marinas@arm.com>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
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        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "jasowang@redhat.com" <jasowang@redhat.com>,
        Stephen Hemminger <sthemmin@microsoft.com>,
        vkuznets <vkuznets@redhat.com>
Subject: RE: [PATCH 3/4] Drivers: hv: vmbus: Add hooks for per-CPU IRQ
Thread-Topic: [PATCH 3/4] Drivers: hv: vmbus: Add hooks for per-CPU IRQ
Thread-Index: AQHUghEmRPt7Kjul9E+Q8Cz+6wluT6VidjKAgAAFstCAAAR8gIAAAInQgACtqgCAAEKKgIAI3aXQ
Date:   Mon, 3 Dec 2018 01:47:39 +0000
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From: Will Deacon <will.deacon@arm.com>  Sent: Tuesday, November 27, 2018 2=
:19 AM

> > > The general approach is for patches 1 and 2 of the series to provide
> > > all the new code under arch/arm64 to enable Hyper-V.  But the code
> > > won't get called (or even built) with just these two patches because
> > > CONFIG_HYPERV can't be selected.  Patch 3 is separate because it
> > > applies to architecture independent code and arch/x86 code -- I thoug=
ht
> > > there might be value in keeping the ARM64 and x86 patches distinct.
> > > Patch 4 applies to architecture independent code, and enables the
> > > ARM64 code in patches 1 and 2 to be compiled and run when
> > > CONFIG_HYPERV is selected.
> > >
> > > If combining some of the patches in the series is a better approach, =
I'm
> > > good with that.
> >
> > Ok, that makes more sense, if it is easier to get the ARM people to
> > review this, that's fine.  Doesn't seem like anyone did that yet :(
>=20
> It's on the list, but thanks for having a look as well!
>=20
> Will

Will -- I'll hold off on sending a new version, pending comments from
the ARM64 maintainers.  Let me know if you prefer that I do otherwise.

Michael