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Message-ID: <7a2f88d849ada782de6e27676518d0b9897e30e7.camel@baylibre.com>
Subject: Re: [PATCH 2/2] irqchip/meson-gpio: Add support for Meson-G12A SoC
From:   Jerome Brunet <jbrunet@baylibre.com>
To:     Xingyu Chen <xingyu.chen@amlogic.com>,
        Marc Zyngier <marc.zyngier@arm.com>,
        Jason Cooper <jason@lakedaemon.net>,
        Thomas Gleixner <tglx@linutronix.de>,
        Kevin Hilman <khilman@baylibre.com>
Cc:     Jianxin Pan <jianxin.pan@amlogic.com>,
        Carlo Caione <carlo@caione.org>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Rob Herring <robh@kernel.org>,
        linux-amlogic@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Date:   Mon, 03 Dec 2018 10:19:26 +0100
In-Reply-To: <20181203061324.36248-3-xingyu.chen@amlogic.com>
References: <20181203061324.36248-1-xingyu.chen@amlogic.com>
         <20181203061324.36248-3-xingyu.chen@amlogic.com>
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On Mon, 2018-12-03 at 14:13 +0800, Xingyu Chen wrote:
> The Meson-G12A SoC uses the same GPIO interrupt controller IP block as the
> other Meson SoCs, A totle of 100 pins can be spied on, which is the sum of:
> 
> - 223:100 undefined (no interrupt)
> - 99:97   3 pins on bank GPIOE
> - 96:77   20 pins on bank GPIOX
> - 76:61   16 pins on bank GPIOA
> - 60:53   8 pins on bank GPIOC
> - 52:37   16 pins on bank BOOT
> - 36:28   9 pins on bank GPIOH
> - 27:12   16 pins on bank GPIOZ
> - 11:0    12 pins in the AO domain
> 
> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
> ---
>  drivers/irqchip/irq-meson-gpio.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-
> gpio.c
> index 7b531fd075b8..971e8dea069a 100644
> --- a/drivers/irqchip/irq-meson-gpio.c
> +++ b/drivers/irqchip/irq-meson-gpio.c
> @@ -67,12 +67,17 @@ static const struct meson_gpio_irq_params axg_params = {
>  	.nr_hwirq = 100,
>  };
>  
> +static const struct meson_gpio_irq_params g12a_params = {
> +	.nr_hwirq = 100,
> +};
> +

Same comment as on i2c, the g12 seems compatible with the axg.
Is this patchset patchset really necessary ?

>  static const struct of_device_id meson_irq_gpio_matches[] = {
>  	{ .compatible = "amlogic,meson8-gpio-intc", .data = &meson8_params },
>  	{ .compatible = "amlogic,meson8b-gpio-intc", .data = &meson8b_params
> },
>  	{ .compatible = "amlogic,meson-gxbb-gpio-intc", .data = &gxbb_params
> },
>  	{ .compatible = "amlogic,meson-gxl-gpio-intc", .data = &gxl_params },
>  	{ .compatible = "amlogic,meson-axg-gpio-intc", .data = &axg_params },
> +	{ .compatible = "amlogic,meson-g12a-gpio-intc", .data = &g12a_params
> },
>  	{ }
>  };
>