Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp6831418imu; Mon, 3 Dec 2018 03:37:36 -0800 (PST) X-Google-Smtp-Source: AFSGD/WFIGC0bZDqOYV5imXAcrZCOF97NCxpt0Xes7DUN4DCsDILprjR1GrBBGPAToQWuD0Nqdb+ X-Received: by 2002:a63:6ac5:: with SMTP id f188mr13051535pgc.165.1543837056880; Mon, 03 Dec 2018 03:37:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543837056; cv=none; d=google.com; s=arc-20160816; b=pYZynwv0cAFzqDsKH5dAnPaOpmBxMhUF5tEZP6nzs9XxOTg0NzWXz7xjEyffq3O9Mp WIxdoge6M05La//pA4jGV1xmlvfAbo1T2O9+gZv+AnMqmq2PLP258nfJk5OmTOvTLaWt 7qWRZZ8HETjAA6qUTv7ecx4Dxr68Lf1biiUtwQ+F18icHYA3N3Xq3oldiIkxc1dIOz7/ M7xZGQ9/qfaqxNfgziliUW8v7+M0arh6HsH4o3750+IPFPMMgG4bq4J6ZOro/Gwen57b hWJgn89CFa/0K5QALohedk+n5PQyt7d/EeZeKIt3dznb6qHaTM3QuB6fyyIdTuFPLXQH 3PDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=AQ8DZQ9oc4wcYbWWdnF4EZLdhCiIG9gHGYIoIDLJAvk=; b=02sz/ZX+s9f181H6jtDQDkeKYiNhVtakKVbimTh5riMdPaVeLRRnAnipTxVhg2qqTk WmKjR55yqklPnMp/PfaNbmjFNzxAAamBarzn9JOlFpFb8ox0Y/vJhVW+LFL0F/v+AfLB YK5z/EmvZj274vFw6iOaIBsIsnvxsmomDuhblklPRW96DGE0/PXh7BaX9+B1OROyzKVd TAbJcLmbbv039JBx+3ODYu0RZWIVA3z3Dbb0jBzgQ7OturampoQMKfxtZ017//uoY7MA N3rdDpam2eC5gPuVw4ISicxQMuYSRkC7khQVAVGMcyqbJY1p7lQTtfHqIkOCCdaxiuod EMtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 37si14009236plv.243.2018.12.03.03.37.22; Mon, 03 Dec 2018 03:37:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726511AbeLCLhS (ORCPT + 99 others); Mon, 3 Dec 2018 06:37:18 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:16016 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726369AbeLCLhS (ORCPT ); Mon, 3 Dec 2018 06:37:18 -0500 X-UUID: 6253fd6dc52e4008ba911d94cb5356ec-20181203 X-UUID: 6253fd6dc52e4008ba911d94cb5356ec-20181203 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1467812300; Mon, 03 Dec 2018 19:36:32 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 3 Dec 2018 19:36:31 +0800 Received: from mtkslt301.mediatek.inc (10.21.14.114) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 3 Dec 2018 19:36:31 +0800 From: YT Shen To: Matthias Brugger CC: Rob Herring , Mark Rutland , , , , , , YT Shen Subject: [PATCH 7/8] arm64: dts: add nand nodes for MT2712 Date: Mon, 3 Dec 2018 19:36:01 +0800 Message-ID: <1543836962-18293-8-git-send-email-yt.shen@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543836962-18293-1-git-send-email-yt.shen@mediatek.com> References: <1543836962-18293-1-git-send-email-yt.shen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: YT Shen --- arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 4f0aa65..e8afb54 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -504,6 +504,27 @@ status = "disabled"; }; + nandc: nfi@1100e000 { + compatible = "mediatek,mt2712-nfc"; + reg = <0 0x1100e000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_NFI2X_EN>, <&pericfg CLK_PERI_NFI>; + clock-names = "nfi_clk", "pad_clk"; + ecc-engine = <&bch>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bch: ecc@1100f000 { + compatible = "mediatek,mt2712-ecc"; + reg = <0 0x1100f000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_NFI1X_CK_EN>; + clock-names = "nfiecc_clk"; + status = "disabled"; + }; + i2c3: i2c@11010000 { compatible = "mediatek,mt2712-i2c"; reg = <0 0x11010000 0 0x90>, -- 1.9.1