Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp7054878imu; Mon, 3 Dec 2018 07:05:44 -0800 (PST) X-Google-Smtp-Source: AFSGD/U1ICLYVPBSkqUPDnvqA6UaDhWx04LZt9yAPbiWiu3F2FtByxuysZ3R4SoRgSqw+OKzFahs X-Received: by 2002:a17:902:7c0a:: with SMTP id x10mr16541537pll.65.1543849544767; Mon, 03 Dec 2018 07:05:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543849544; cv=none; d=google.com; s=arc-20160816; b=zY4N+BehGg6oXa3fwz/19iYmxwhXrxGpHCSCLP0KwV/P2MhPKkcRD718fgtRmRLVal AUgsvQjBY5rKcPCs9LkjRlTbwhbiO9187WSDRzJmj41b5dE7SIXCQOxLVeXINxm/CvXm zAXIQWh8jRITX3IkgXDMuf3nArSJiznK30AYPy0VoQ3hwa3KSeREmGyc9dMu3s5a1r47 b0jjoYjjq9MSDMQ4g/DJJ3R2Kqm4irzeIoVc2NNneN0XSrWK1R8dvLSfOMnSoncynLLW 7FHnrsDMkefxCx9jc4NiN38/cL12LqfZjYLVpDsHItfFi7lqCUedzsG3mfJcoALGoSbF MvAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-disposition :content-transfer-encoding:mime-version:in-reply-to:references :subject:cc:to:from:date:message-id; bh=mSq10g9e4zYBIOmJa71o87gb+XGnmQFum33dk5Bbwlg=; b=stysqGxCIQ0bCNSQpizxFC+NjGck6wU2/cHarsbg85pTlMKQWq0gSzArjKka8iEuMG +szGPHuJjuSaYlcQjf1VAuGM/F1PIVIl678pCgQMCZSmQ1+bRTaRxA6I7QmnV4hj9eOn Y4+mM66Lwlqp4YBDbcgy4uLGfK72XrGgC3FG3PyZZ8gw7LA66cfbBDWqUEuAM4z+WpdJ In+A8WJ7x10qshRhbNpoxyo70GxLs9jXn/v/Edui3POCVhHwE2rsHvveAadTcOyalk/b +j148XY73yIHaicZO37AGfiettHTYQpxVR4ndkp2pqubeTnBii5Z83B3dYKbTbbS+Fvc 1toQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o1si13815430pld.79.2018.12.03.07.05.28; Mon, 03 Dec 2018 07:05:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726586AbeLCPEk convert rfc822-to-8bit (ORCPT + 99 others); Mon, 3 Dec 2018 10:04:40 -0500 Received: from prv1-mh.provo.novell.com ([137.65.248.33]:52693 "EHLO prv1-mh.provo.novell.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726162AbeLCPEk (ORCPT ); Mon, 3 Dec 2018 10:04:40 -0500 Received: from INET-PRV1-MTA by prv1-mh.provo.novell.com with Novell_GroupWise; Mon, 03 Dec 2018 08:04:36 -0700 Message-Id: <5C054600020000780020245F@prv1-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 18.1.0 Date: Mon, 03 Dec 2018 08:04:32 -0700 From: "Jan Beulich" To: "Marek Marczykowski" Cc: "Dwayne Litzenberger" , "Stefano Stabellini" , "xen-devel" , "Boris Ostrovsky" , "Juergen Gross" , Subject: Re: [Xen-devel] [PATCH 2/2] xen-pciback: Allow enabling/disabling expansion ROM References: <5C050CF3020000780020223F@prv1-mh.provo.novell.com> <20181203144738.GQ781@mail-itl> In-Reply-To: <20181203144738.GQ781@mail-itl> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> On 03.12.18 at 15:47, wrote: > On Mon, Dec 03, 2018 at 04:01:07AM -0700, Jan Beulich wrote: >> >>> On 02.12.18 at 18:47, wrote: >> > From: Dwayne Litzenberger >> > >> > Newer AMD GPUs store their initialization routines as bytecode on the >> > ROM. This fixes the following initialization error inside the VM when >> > doing PCI passthrough: >> > >> > radeon 0000:00:05.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0xffff >> > radeon 0000:00:05.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0xffff >> > [drm:radeon_get_bios [radeon]] *ERROR* Unable to locate a BIOS ROM >> > radeon 0000:00:05.0: Fatal error during GPU init >> >> Isn't it that qemu is supposed to surface the ROM image to guests, >> making it unnecessary to allow guests control over the physical >> enable bit? > > Unless that qemu is in stubdomain, where it use pciback to access > everything about the device... Would be quite helpful to explain this in the description. >> Also why would allowing to alter the bit depend on >> whether the address portion of the value is non-zero? > > That's a good question. According to commit message I think it should be > a ROM presence check instead. If needed at this point at all - is this > function even called if there is no ROM? I suppose this was a question to Dwayne, not me. Jan