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[209.132.180.67]) by mx.google.com with ESMTP id bd3si13696413plb.286.2018.12.03.07.51.48; Mon, 03 Dec 2018 07:52:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=qQtvVvuq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726844AbeLCPto (ORCPT + 99 others); Mon, 3 Dec 2018 10:49:44 -0500 Received: from mail.kernel.org ([198.145.29.99]:44532 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726634AbeLCPto (ORCPT ); Mon, 3 Dec 2018 10:49:44 -0500 Received: from mail-qk1-f174.google.com (mail-qk1-f174.google.com [209.85.222.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4DD44214D9; Mon, 3 Dec 2018 15:49:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1543852181; bh=pN3h6zRzeTbZdA+F+ILK+NrhH5etsg5R8T3a6yNT9J0=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=qQtvVvuq4G319BAMalYpRBu4O4mDIbG0mfb4ByxjvUtyC60D2GNrAeKlBRSM8dKZT W8B8ESfb3Cmh9g4j1/OKNCxtot5silr3tuAz5MLW1BF6iiYssaYGJW6R3f1kggDZlB yTNUfCxP9+lJBOVXXQOleynqI8rYP9wmUiO36dFk= Received: by mail-qk1-f174.google.com with SMTP id o89so7613481qko.0; Mon, 03 Dec 2018 07:49:41 -0800 (PST) X-Gm-Message-State: AA+aEWZShbGd2kZ5Ph75JHdjHk6yFeX8rx5SBLLYDoe0QHDJ/6eaDuRb h52G+048sYEmLy2kHXtAA5jZQmc7eBocIITBFg== X-Received: by 2002:a37:7682:: with SMTP id r124mr15416720qkc.79.1543852180470; Mon, 03 Dec 2018 07:49:40 -0800 (PST) MIME-Version: 1.0 References: <1542589274-13878-1-git-send-email-sugaya.taichi@socionext.com> <1542589274-13878-3-git-send-email-sugaya.taichi@socionext.com> <154337047410.88331.9696178601340675631@swboyd.mtv.corp.google.com> <154356579701.88331.5043467509900444879@swboyd.mtv.corp.google.com> In-Reply-To: From: Rob Herring Date: Mon, 3 Dec 2018 09:49:29 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 02/14] dt-bindings: soc: milbeaut: Add Milbeaut trampoline description To: sugaya.taichi@socionext.com Cc: Stephen Boyd , devicetree@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , linux-clk , "linux-kernel@vger.kernel.org" , "open list:SERIAL DRIVERS" , Michael Turquette , Mark Rutland , Greg Kroah-Hartman , Daniel Lezcano , Thomas Gleixner , Russell King , Jiri Slaby , Masami Hiramatsu , Jassi Brar Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 3, 2018 at 1:42 AM Sugaya, Taichi wrote: > > Hi, > > On 2018/11/30 17:16, Stephen Boyd wrote: > > Quoting Sugaya, Taichi (2018-11-29 04:24:51) > >> On 2018/11/28 11:01, Stephen Boyd wrote: > >>> Quoting Sugaya Taichi (2018-11-18 17:01:07) > >>>> create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,m10v.txt > >>>> > >>>> diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,m10v.txt b/Documentation/devicetree/bindings/soc/socionext/socionext,m10v.txt > >>>> new file mode 100644 > >>>> index 0000000..f5d906c > >>>> --- /dev/null > >>>> +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,m10v.txt > >>>> @@ -0,0 +1,12 @@ > >>>> +Socionext M10V SMP trampoline driver binding > >>>> + > >>>> +This is a driver to wait for sub-cores while boot process. > >>>> + > >>>> +- compatible: should be "socionext,smp-trampoline" > >>>> +- reg: should be <0x4C000100 0x100> > >>>> + > >>>> +EXAMPLE > >>>> + trampoline: trampoline@0x4C000100 { > >>> Drop the 0x part of unit addresses. > >> > >> Okay. > >> > >> > >>>> + compatible = "socionext,smp-trampoline"; > >>>> + reg = <0x4C000100 0x100>; > >>> Looks like a software construct, which we wouldn't want to put into DT > >>> this way. DT doesn't describe drivers. > >> We would like to use this node only getting the address of the > >> trampoline area > >> in which sub-cores wait. (They have finished to go to this area in previous > >> bootloader process.) > > > > Is this area part of memory, or a special SRAM? If it's part of memory, > > I would expect this node to be under the reserved-memory node and > > pointed to by some other node that uses this region. Could even be the > > CPU nodes. > > Yes, 0x4C000100 is a part of memory under the reserved-memory node. So > we would like to use the SRAM ( allocated 0x00000000 ) area instead. > BTW, sorry, the trampoline address of this example is simply wrong. We > were going to use a part of the SRAM from the beginning. > > > > >> > >> So should we embed the constant value in source codes instead of getting > >> from > >> DT because the address is constant at the moment? Or is there other > >> approach? > >> > > > > If it's constant then that also works. Why does it need to come from DT > > at all then? > > We think it is not good to embed constant value in driver codes and do > not have another way... > Are there better ways? If this is just memory, can you use the standard spin-table binding in the DT spec? There are some requirements like 64-bit values even on 32-bit machines (though this gets violated). Rob