Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp7734838imu; Mon, 3 Dec 2018 18:40:18 -0800 (PST) X-Google-Smtp-Source: AFSGD/WGW4kid5pxoEZHGO+d2+uHrThUcbpIjW08LruGmoaT+his/H1jRbkn+sBeYndBD8Sgstl+ X-Received: by 2002:a62:3603:: with SMTP id d3mr19097096pfa.146.1543891218272; Mon, 03 Dec 2018 18:40:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543891218; cv=none; d=google.com; s=arc-20160816; b=yM7w5hEFKOl32UMd14kVpQ+Ts5dUJk0KHb+tKx+XqelSRz0UTtW1KLOy2QRBQ8ujOL UZTXTijDFijxpWJ1HD1l3mYVhqIf80TPowiSEvwvvDF6UdrRdft3DFZYapT54yKsDC24 rvZSae45FwPJD6qiyvxbgzu8caCmCuN6mD7eaYvENqDEG4sSH4KhAJ5+z1yQvj4lx6V5 yw3rAT4GdS1MU/PvRXY8Ribunya2wiY5CDBk5/y1n0QEHWXXssMUo11j2pwdpGUVNSgS u2GaohdFr3rt8Wdp5O89czv+DBtULABWiv0C8UHJKKftdka/2LXT/u09phRfh83Co/Yh DhXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=dfrYNzKTsFHaFhmvG8ohubrn6zFmcQd9/TGi0W7GZkY=; b=SsomX8e7P8kjLRcsr6MEywf9CyW4QNClvva9cn47q9+ItnnnCCHVlV9U4JZMRUk2yJ GElnvF74ePT+CHeB+YuNpon5bBQS6F0qBsFbEShGguBTQwCTpw6z2RgSpM+wSw3PxGJ/ 20uLA2MduO/hLg1mHb5628qJGVlqtkLh032ahrTJkecpuftLx29ktdJwrjiuzZNFitSd 2QbIyJWTdsqX1E6w9yYY7REk6iL0a/JH+h42ahDFlIWw0Wzprco688yyYHbRvGQxcii2 DT0CONAvxtZfMcCxvq4hzMYUKSwyrFX7uCD1MqM+/eYA9uj1Ur7OgKhImIT/9So3DYF7 h9bQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t136si18195459pfc.262.2018.12.03.18.40.02; Mon, 03 Dec 2018 18:40:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725988AbeLDCj2 (ORCPT + 99 others); Mon, 3 Dec 2018 21:39:28 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:42408 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725937AbeLDCj2 (ORCPT ); Mon, 3 Dec 2018 21:39:28 -0500 Received: from [10.18.29.207] (10.18.29.207) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server (TLS) id 15.0.1320.4; Tue, 4 Dec 2018 10:39:34 +0800 Subject: Re: [PATCH v7 2/4] clk: meson: add DT documentation for emmc clock controller To: Stephen Boyd , Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Jian Hu , Qiufang Dai , Hanjie Lin , Victor Wan , , , , References: <1542284312-55418-1-git-send-email-jianxin.pan@amlogic.com> <1542284312-55418-3-git-send-email-jianxin.pan@amlogic.com> <154387713374.88331.16436869339024592009@swboyd.mtv.corp.google.com> From: Jianxin Pan Message-ID: Date: Tue, 4 Dec 2018 10:39:34 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.3.2 MIME-Version: 1.0 In-Reply-To: <154387713374.88331.16436869339024592009@swboyd.mtv.corp.google.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.18.29.207] X-ClientProxiedBy: mail-sh2.amlogic.com (10.18.11.6) To mail-sh2.amlogic.com (10.18.11.6) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stephen, On 2018/12/4 6:45, Stephen Boyd wrote: > Quoting Jianxin Pan (2018-11-15 04:18:30) >> diff --git a/include/dt-bindings/clock/amlogic,mmc-clkc.h b/include/dt-bindings/clock/amlogic,mmc-clkc.h >> new file mode 100644 >> index 0000000..162b949 >> --- /dev/null >> +++ b/include/dt-bindings/clock/amlogic,mmc-clkc.h >> @@ -0,0 +1,17 @@ >> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ >> +/* >> + * Meson MMC sub clock tree IDs >> + * >> + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. >> + * Author: Yixun Lan >> + */ >> + >> +#ifndef __MMC_CLKC_H >> +#define __MMC_CLKC_H >> + >> +#define CLKID_MMC_DIV 1 > > Why does the define numbering start with 1 instead of 0? > The Clock ID 0 is used by CLKID_MMC_MUX. CLKID_MMC_MUX is an internal clock which defined in drivers/clk/meson/mmc-clkc.c, and it's the parent of CLKID_MMC_DIV. >> +#define CLKID_MMC_PHASE_CORE 2 >> +#define CLKID_MMC_PHASE_TX 3 >> +#define CLKID_MMC_PHASE_RX 4 >> + > > . >