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[209.132.180.67]) by mx.google.com with ESMTP id h13si16171330pgs.17.2018.12.05.02.15.25; Wed, 05 Dec 2018 02:15:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FGOS0AQP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727845AbeLEKOQ (ORCPT + 99 others); Wed, 5 Dec 2018 05:14:16 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:41706 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727297AbeLEJgJ (ORCPT ); Wed, 5 Dec 2018 04:36:09 -0500 Received: by mail-wr1-f66.google.com with SMTP id x10so18890886wrs.8 for ; Wed, 05 Dec 2018 01:36:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=DPSKJfYQ6rC06gChBEjW81xQvhnC/YU81KmkgKXcX0A=; b=FGOS0AQPb15fpsdCL2QwMtrnTXAA2CHJb+gjI9fiVHL2iuqxVYnEwFBT0VOjcY/kxb 1aD8qcf9nyLp6ggWIhhSXj9pm5Q6cvVwVGQzUGxLvs3txnvli1q1STtO420I7CPO5/3t NrUUXZe6D+JyIS9wkK1i0r3FLIcMYWPHvNtJs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=DPSKJfYQ6rC06gChBEjW81xQvhnC/YU81KmkgKXcX0A=; b=bj/bDQRYq1ox7yHbAXJd/qKtsomBJcqWAMD9FURaQGQRAe7MvwdGeanRUdxaW7dLiE SEIWEHDaBM2IwWGOW+/yUaI7L/ah8ZCpp0RBdcJ0lyG4ORUC9DtRCwY9LIM3hGdtQ9Sx SA2cAyBVg6szrWdofaIEaLEzHO2+imxQ8/yfSIupZ1jlmuRS+Xt7UzmxXpkAxU/vH4az Oxz3MNCaPZfxKT0Cyg8E/IZ9+58p0MPfxz5t9ZRprtl9mswkKatdaVGQimAGn5c5TWaV SV2PaqgNx8Ld4ygcnWcAXLCbs9IVArdi7TdoKInYmL0llcWziznBmd75WswOqmnL5VzY Izyg== X-Gm-Message-State: AA+aEWYAp322GxV6Y7b2exKBG2MAJLzn372NgQnCPySOIyyZsWZDyz4a 79lkq+AchgMy3mSrtxIgwWyJ7g== X-Received: by 2002:adf:c612:: with SMTP id n18mr20268552wrg.174.1544002567223; Wed, 05 Dec 2018 01:36:07 -0800 (PST) Received: from dell ([2.31.167.218]) by smtp.gmail.com with ESMTPSA id s1sm24468471wro.9.2018.12.05.01.36.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 05 Dec 2018 01:36:06 -0800 (PST) Date: Wed, 5 Dec 2018 09:36:04 +0000 From: Lee Jones To: Pascal PAILLET-LME Cc: "dmitry.torokhov@gmail.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "wim@linux-watchdog.org" , "linux@roeck-us.net" , "linux-input@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-watchdog@vger.kernel.org" , "benjamin.gaignard@linaro.org" , "eballetbo@gmail.com" , "axel.lin@ingics.com" Subject: Re: [PATCH v7 0/7] Introduce STPMIC1 PMIC Driver Message-ID: <20181205093604.GZ26661@dell> References: <1543571742-17995-1-git-send-email-p.paillet@st.com> <20181203071145.GA26661@dell> <5C069C47.6080305@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5C069C47.6080305@st.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 04 Dec 2018, Pascal PAILLET-LME wrote: > Le 12/03/2018 08:11 AM, Lee Jones a écrit : > > On Fri, 30 Nov 2018, Pascal PAILLET-LME wrote: > > > >> The goal of this patch-set is to propose a driver for the STPMIC1 PMIC from > >> STMicroelectronics. > >> The STPMIC1 regulators supply power to an application processor as well as > >> to external system peripherals such as DDR, Flash memories and system > >> devices. It also features onkey button input and an hardware watchdog. > >> The STPMIC1 is controlled via I2C. > >> > >> Main driver is drivers/mfd/stpmic1 that handle I2C regmap configuration and > >> irqchip. stpmic1_regulator, stpmic1_onkey and stpmic1_wdt need stpmic1 mfd > >> as parent. > >> > >> STPMIC1 MFD and regulator drivers maybe mandatory at boot time. > >> > >> Pascal Paillet (7): > >> changes in v7: > >> * rebase on regul/for-next > >> > >> dt-bindings: mfd: document stpmic1 > >> mfd: stpmic1: add stpmic1 driver > >> dt-bindings: input: document stpmic1 pmic onkey > >> input: stpmic1: add stpmic1 onkey driver > >> dt-bindings: watchdog: document stpmic1 pmic watchdog > >> watchdog: stpmic1: add stpmic1 watchdog driver > >> regulator: stpmic1: fix regulator_lock usage > >> > >> .../devicetree/bindings/input/st,stpmic1-onkey.txt | 28 +++ > >> .../devicetree/bindings/mfd/st,stpmic1.txt | 61 ++++++ > >> .../bindings/watchdog/st,stpmic1-wdt.txt | 11 ++ > >> drivers/input/misc/Kconfig | 11 ++ > >> drivers/input/misc/Makefile | 2 + > >> drivers/input/misc/stpmic1_onkey.c | 198 +++++++++++++++++++ > >> drivers/mfd/Kconfig | 16 ++ > >> drivers/mfd/Makefile | 1 + > >> drivers/mfd/stpmic1.c | 213 +++++++++++++++++++++ > >> drivers/regulator/stpmic1_regulator.c | 2 +- > > Is it just Mark you're waiting on now? > It is ok now, Mark has applied the patch. > Evrey thing has been acked now. What is the nex step ? Mark has applied patch 7? Why don't I see that? Should you have removed it from this set? -- Lee Jones [李琼斯] Linaro Services Technical Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog