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To:     Ryder Lee <ryder.lee@mediatek.com>
From:   Stephen Boyd <sboyd@kernel.org>
In-Reply-To: <2e828830d051ae641cfd55a6590cb243539d6ca8.1543991319.git.ryder.lee@mediatek.com>
Cc:     Matthias Brugger <matthias.bgg@gmail.com>,
        Weijie Gao <weijie.gao@mediatek.com>,
        linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org,
        Ryder Lee <ryder.lee@mediatek.com>
References: <2e828830d051ae641cfd55a6590cb243539d6ca8.1543991319.git.ryder.lee@mediatek.com>
Message-ID: <154404182868.88331.17985605359797731500@swboyd.mtv.corp.google.com>
User-Agent: alot/0.7
Subject: Re: [PATCH] clk: mediatek: fix the PCIe MAC clock parent
Date:   Wed, 05 Dec 2018 12:30:28 -0800
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Quoting Ryder Lee (2018-12-04 22:41:10)
> The PCIe function doesn't work as the clock tree of MAC layer is wrong.
> Hence fix the clock table.
> =

> Fixes: 3b5e748615e7 ("clk: mediatek: add clock support for MT7629 SoC")
> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
> ---

Applied to clk-next