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[209.85.167.54]) by smtp.gmail.com with ESMTPSA id p77-v6sm212380lja.0.2018.12.06.10.15.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 06 Dec 2018 10:15:25 -0800 (PST) Received: by mail-lf1-f54.google.com with SMTP id n18so1071286lfh.6 for ; Thu, 06 Dec 2018 10:15:24 -0800 (PST) X-Received: by 2002:a19:3fcf:: with SMTP id m198mr16822120lfa.106.1544120124263; Thu, 06 Dec 2018 10:15:24 -0800 (PST) MIME-Version: 1.0 References: <20181205163624.1842-1-sean.j.christopherson@intel.com> <20181206073409.GA64887@gmail.com> In-Reply-To: <20181206073409.GA64887@gmail.com> From: Linus Torvalds Date: Thu, 6 Dec 2018 10:15:08 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] x86/mm/fault: Streamline the fault error_code decoder some more To: Ingo Molnar Cc: sean.j.christopherson@intel.com, dave.hansen@linux.intel.com, Andrew Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , bp@alien8.de, "the arch/x86 maintainers" , Peter Anvin , Linux List Kernel Mailing , Rik van Riel , yu-cheng.yu@intel.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 5, 2018 at 11:34 PM Ingo Molnar wrote: > > Yeah, so I don't like the overly long 'SUPERVISOR' and the somewhat > inconsistent, sporadic handling of negatives. Here's our error code bits: > > /* > * Page fault error code bits: > * > * bit 0 == 0: no page found 1: protection fault > * bit 1 == 0: read access 1: write access > * bit 2 == 0: kernel-mode access 1: user-mode access No. Really not at all. Bit 2 is *not* "kernel vs user". Never has been. Never will be. It's a single bit that mixes up *three* different cases: - regular user mode access (value: 1) - regular CPL0 access (value: 0) - CPU system access (value: 0) and that third case really is important and relevant. And importantly, it can happen from user space. In fact, these days we possibly have a fourth case: - kernel access using wruss (value: 1) and I'd rather see just the numbers (which you have to know to decode) than see the simplified AND WRONG decoding of those numbers. Please don't ever confuse the fault U/S bit with "user vs kernel". It's just not true, and people should be very very aware of it now being true. If you care whether a page fault happened in user mode or not, you have to look at the register state (ie "user_mode(regs)"). Please call the U/S bit something else than "user" or "kernel". Linus