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[209.132.180.67]) by mx.google.com with ESMTP id b26si795169pgl.539.2018.12.06.11.05.42; Thu, 06 Dec 2018 11:06:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=N+hAakUg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725916AbeLFTEZ (ORCPT + 99 others); Thu, 6 Dec 2018 14:04:25 -0500 Received: from mail-it1-f194.google.com ([209.85.166.194]:35997 "EHLO mail-it1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725963AbeLFTEX (ORCPT ); Thu, 6 Dec 2018 14:04:23 -0500 Received: by mail-it1-f194.google.com with SMTP id c9so3226168itj.1 for ; Thu, 06 Dec 2018 11:04:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=zx7YR9jOJ2YEsfpWpnWI9aF0M85Tj/3S/gHkH/Z2x2k=; b=N+hAakUgTOXIh6XRNJvouRnqnCEf/Yq1WUaHuWAy/xAk5JyssZNP10K6+wEvTV4dtC QJOg4460KC8m64BnXP3VQYEAhc8HYgJfEu0jsUTassu2K9wABi34+cQGLDiagcQaNSt5 3m3Ew6dkRjhhqQw/8OV767ZMCDy7niiAZeqX8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=zx7YR9jOJ2YEsfpWpnWI9aF0M85Tj/3S/gHkH/Z2x2k=; b=Jmy7JVfvCwHTn9oVbWdGRtaGKI/PuW7LSxiK6jleLwxZRHPDy0CU508cfTyfYIXo/8 Jr1GE/ZYT2YJ3wXxx3uHSLebgS0ZlY/dj/Q2AFyOVu9/BlbcPV5miqN39mO5fMIre+Gs JvmJNVfJx/xalQwUnT0l/ZMpi+lGP1erMd3EeEgd+C75SEzzy0B52CwqMPx09h8E9u+0 FkmVmIHB8NJzsAHyDjfaAPyMWCZ9oD/llPF5NyjRgj8OtIrh+rqQ2aFSu3oXTHddUvqD fQHMKmMh5Ov7IhrQGuOcQIfMUmdnn/bJVT274p7SCp9XamprLPmGGMIfvimr7ha7PZSh jVTg== X-Gm-Message-State: AA+aEWbUjyWuRPFFLYxIqxytSRRZbQbvXTLl3wsc4Zwvki5LKfOHRuge LfEZxMrkvyulIGKYJBd1Bw4cJqCbCaYxV8P53pquQQ== X-Received: by 2002:a05:660c:4b:: with SMTP id p11mr20687165itk.71.1544123061053; Thu, 06 Dec 2018 11:04:21 -0800 (PST) MIME-Version: 1.0 References: <20181128000754.18056-1-rick.p.edgecombe@intel.com> <20181128000754.18056-2-rick.p.edgecombe@intel.com> <4883FED1-D0EC-41B0-A90F-1A697756D41D@gmail.com> <20181204160304.GB7195@arm.com> <51281e69a3722014f718a6840f43b2e6773eed90.camel@intel.com> <20181205114148.GA15160@arm.com> In-Reply-To: From: Ard Biesheuvel Date: Thu, 6 Dec 2018 20:04:09 +0100 Message-ID: Subject: Re: [PATCH 1/2] vmalloc: New flag for flush before releasing pages To: Andy Lutomirski Cc: Will Deacon , Rick Edgecombe , Nadav Amit , Linux Kernel Mailing List , Daniel Borkmann , Jessica Yu , Steven Rostedt , Alexei Starovoitov , Linux-MM , Jann Horn , "Dock, Deneen T" , Peter Zijlstra , kristen@linux.intel.com, Andrew Morton , Ingo Molnar , anil.s.keshavamurthy@intel.com, Kernel Hardening , Masami Hiramatsu , naveen.n.rao@linux.vnet.ibm.com, "David S. Miller" , "" , Dave Hansen Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 6 Dec 2018 at 19:54, Andy Lutomirski wrote: > > > On Dec 5, 2018, at 11:29 PM, Ard Biesheuvel = wrote: > > > >> On Thu, 6 Dec 2018 at 00:16, Andy Lutomirski wrote: > >> > >>> On Wed, Dec 5, 2018 at 3:41 AM Will Deacon wrot= e: > >>> > >>>> On Tue, Dec 04, 2018 at 12:09:49PM -0800, Andy Lutomirski wrote: > >>>> On Tue, Dec 4, 2018 at 12:02 PM Edgecombe, Rick P > >>>> wrote: > >>>>> > >>>>>> On Tue, 2018-12-04 at 16:03 +0000, Will Deacon wrote: > >>>>>> On Mon, Dec 03, 2018 at 05:43:11PM -0800, Nadav Amit wrote: > >>>>>>>> On Nov 27, 2018, at 4:07 PM, Rick Edgecombe > >>>>>>>> wrote: > >>>>>>>> > >>>>>>>> Since vfree will lazily flush the TLB, but not lazily free the u= nderlying > >>>>>>>> pages, > >>>>>>>> it often leaves stale TLB entries to freed pages that could get = re-used. > >>>>>>>> This is > >>>>>>>> undesirable for cases where the memory being freed has special p= ermissions > >>>>>>>> such > >>>>>>>> as executable. > >>>>>>> > >>>>>>> So I am trying to finish my patch-set for preventing transient W+= X mappings > >>>>>>> from taking space, by handling kprobes & ftrace that I missed (th= anks again > >>>>>>> for > >>>>>>> pointing it out). > >>>>>>> > >>>>>>> But all of the sudden, I don=E2=80=99t understand why we have the= problem that this > >>>>>>> (your) patch-set deals with at all. We already change the mapping= s to make > >>>>>>> the memory wrAcked-by: Ard Biesheuvel > > itable before freeing the memory, so why can=E2=80=99t we make it > >>>>>>> non-executable at the same time? Actually, why do we make the mod= ule memory, > >>>>>>> including its data executable before freeing it??? > >>>>>> > >>>>>> Yeah, this is really confusing, but I have a suspicion it's a comb= ination > >>>>>> of the various different configurations and hysterical raisins. We= can't > >>>>>> rely on module_alloc() allocating from the vmalloc area (see nios2= ) nor > >>>>>> can we rely on disable_ro_nx() being available at build time. > >>>>>> > >>>>>> If we *could* rely on module allocations always using vmalloc(), t= hen > >>>>>> we could pass in Rick's new flag and drop disable_ro_nx() altogeth= er > >>>>>> afaict -- who cares about the memory attributes of a mapping that'= s about > >>>>>> to disappear anyway? > >>>>>> > >>>>>> Is it just nios2 that does something different? > >>>>>> > >>>>> Yea it is really intertwined. I think for x86, set_memory_nx everyw= here would > >>>>> solve it as well, in fact that was what I first thought the solutio= n should be > >>>>> until this was suggested. It's interesting that from the other thre= ad Masami > >>>>> Hiramatsu referenced, set_memory_nx was suggested last year and wou= ld have > >>>>> inadvertently blocked this on x86. But, on the other architectures = I have since > >>>>> learned it is a bit different. > >>>>> > >>>>> It looks like actually most arch's don't re-define set_memory_*, an= d so all of > >>>>> the frob_* functions are actually just noops. In which case allocat= ing RWX is > >>>>> needed to make it work at all, because that is what the allocation = is going to > >>>>> stay at. So in these archs, set_memory_nx won't solve it because it= will do > >>>>> nothing. > >>>>> > >>>>> On x86 I think you cannot get rid of disable_ro_nx fully because th= ere is the > >>>>> changing of the permissions on the directmap as well. You don't wan= t some other > >>>>> caller getting a page that was left RO when freed and then trying t= o write to > >>>>> it, if I understand this. > >>>>> > >>>> > >>>> Exactly. > >>> > >>> Of course, I forgot about the linear mapping. On arm64, we've just qu= eued > >>> support for reflecting changes to read-only permissions in the linear= map > >>> [1]. So, whilst the linear map is always non-executable, we will need= to > >>> make parts of it writable again when freeing the module. > >>> > >>>> After slightly more thought, I suggest renaming VM_IMMEDIATE_UNMAP t= o > >>>> VM_MAY_ADJUST_PERMS or similar. It would have the semantics you wan= t, > >>>> but it would also call some arch hooks to put back the direct map > >>>> permissions before the flush. Does that seem reasonable? It would > >>>> need to be hooked up that implement set_memory_ro(), but that should > >>>> be quite easy. If nothing else, it could fall back to set_memory_ro= () > >>>> in the absence of a better implementation. > >>> > >>> You mean set_memory_rw() here, right? Although, eliding the TLB inval= idation > >>> would open up a window where the vmap mapping is executable and the l= inear > >>> mapping is writable, which is a bit rubbish. > >>> > >> > >> Right, and Rick pointed out the same issue. Instead, we should set > >> the direct map not-present or its ARM equivalent, then do the flush, > >> then make it RW. I assume this also works on arm and arm64, although > >> I don't know for sure. On x86, the CPU won't cache not-present PTEs. > > > > If we are going to unmap the linear alias, why not do it at vmalloc() > > time rather than vfree() time? > > That=E2=80=99s not totally nuts. Do we ever have code that expects __va()= to > work on module data? Perhaps crypto code trying to encrypt static > data because our APIs don=E2=80=99t understand virtual addresses. I gues= s if > highmem is ever used for modules, then we should be fine. > The crypto code shouldn't care, but I think it will probably break hibernat= e :-( > RO instead of not present might be safer. But I do like the idea of > renaming Rick's flag to something like VM_XPFO or VM_NO_DIRECT_MAP and > making it do all of this. > > (It seems like some people call it the linear map and some people call > it the direct map. Is there any preference?) Either is fine with me.