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[209.132.180.67]) by mx.google.com with ESMTP id cd2si2628963plb.39.2018.12.07.00.41.06; Fri, 07 Dec 2018 00:41:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EgDeU9vZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726087AbeLGIkR (ORCPT + 99 others); Fri, 7 Dec 2018 03:40:17 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:41006 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726010AbeLGIkN (ORCPT ); Fri, 7 Dec 2018 03:40:13 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id wB78drsS078967; Fri, 7 Dec 2018 02:39:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1544171993; bh=QZAdAI5rRRXeFLYxO45mCN74SAomheYIagGwI/4AuOM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=EgDeU9vZhUOFuNMG1y4MspbM91Q908jXtCQs/au2CzrtiqgcXS9VFTgKRCtzbF/Vg gHoONwxFTbobxLdeS4TOsloi12Ctwu5Wi7kkh6miWL8T+1/dtM7jS8E+6CuWK6COKB UI5sZwb1Jpfz/qDCHQbG2rLXcsVAn/zhTS1M96qM= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id wB78dr1H045276 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 7 Dec 2018 02:39:53 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Fri, 7 Dec 2018 02:39:52 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Fri, 7 Dec 2018 02:39:52 -0600 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id wB78djGv012224; Fri, 7 Dec 2018 02:39:49 -0600 From: Faiz Abbas To: , , CC: , , , , , , , , Subject: [PATCH 1/2] arm64: dts: ti: k3-am654: Add Support for MMC/SD Date: Fri, 7 Dec 2018 14:12:32 +0530 Message-ID: <20181207084233.13700-2-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181207084233.13700-1-faiz_abbas@ti.com> References: <20181207084233.13700-1-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are two MMC host controller instances present on the TI's Am654 SOCs. Add device tree nodes for the same. Signed-off-by: Faiz Abbas --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 916434839603..d07212f16a81 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -129,4 +129,32 @@ clocks = <&k3_clks 113 1>; power-domains = <&k3_pds 113>; }; + + sdhci0: sdhci@4f80000 { + compatible = "ti,am654-sdhci-5.1"; + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; + power-domains = <&k3_pds 47>; + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; + clock-names = "clk_ahb", "clk_xin"; + interrupts = ; + sdhci-caps-mask = <0x80000007 0x0>; + mmc-ddr-1_8v; + ti,otap-del-sel = <0x2>; + ti,trm-icp = <0x8>; + status = "disabled"; + }; + + sdhci1: sdhci@4fa0000 { + compatible = "ti,am654-sdhci-5.1"; + reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>; + power-domains = <&k3_pds 48>; + clocks = <&k3_clks 48 0>, <&k3_clks 48 1>; + clock-names = "clk_ahb", "clk_xin"; + interrupts = ; + sdhci-caps-mask = <0x80000007 0x0>; + mmc-ddr-1_8v; + ti,otap-del-sel = <0x2>; + ti,trm-icp = <0x8>; + status = "disabled"; + }; }; -- 2.19.2