Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1155442imu; Fri, 7 Dec 2018 15:30:26 -0800 (PST) X-Google-Smtp-Source: AFSGD/Ukdjp+WVPEibNZm/QctAyLJNetKJgkpSHmmArecltfwOMsUZfWK46SWGjGoaQHAf5AqH1c X-Received: by 2002:a63:2c0e:: with SMTP id s14mr3716679pgs.132.1544225426786; Fri, 07 Dec 2018 15:30:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544225426; cv=none; d=google.com; s=arc-20160816; b=o16og0gyD5eMuqoTejlvUh17tF7KeJsqiMO4yMOdve1nJhaz7+Cjr+Wt71fAXl1V1J 03NmXIPYwSzGXW3r5cLS9LgCxyv+wARsARGGZL/RpA3tnRdmjVbD9CY7e3p2wrOuCbHK DRiMWG7wkqYiyEH0v9JCsKvMft63rwR2Y+hyhI7G5WRwf5CoLiSlqUlzAOAxltMbGX8a YCXWuGqiSXNC6rR4dH/TD5xeJbf6LV6WE3o2k/sRUlkYf658EQPetSvIfeAuXKMAMXgf 0OqzBIM5d0zyMeJygdQdU1jd8RKhwCkFZ27XQBpm3Xh39CUp004RoC8yBjyzGUKvVxuM dbwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=IOMCtzCHH/8bAidk48htasyfLtH4dFYPPTgxZpEhtQo=; b=lWvtuKnYUr6tS+7fFyLwQBesBNkGv5AwvDmoDsSxh6vtmFfiVM8GpDn3BARN8NMY+u 408GqWRXJgszrOFBt8hW2ViF7bQP3kFXu9ATLNWvbZ6U3d+jRPIRdG2D/GUAOE4QIyBT 100/DG8CUgoxUramjHK1UjW6LPfUaHbkca4VFXaWXtxLr9PczN5F5PSkYtyXyyXHMeru GvH8Rzr0U+XFTxrD8ZbCmWEvaW6rf6PIsyXh6GuwS34/5Nc8ilr9alcLYt/7T7hxWdWe 5XHjZh4Ra55SBuxKRJA857zouL/pUTzu1yyqI/HbptGmffwMntoc213bs86PjlY2l9QH z3og== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o3si3658185pgq.139.2018.12.07.15.30.11; Fri, 07 Dec 2018 15:30:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726081AbeLGX3h (ORCPT + 99 others); Fri, 7 Dec 2018 18:29:37 -0500 Received: from mail-ot1-f66.google.com ([209.85.210.66]:33140 "EHLO mail-ot1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726041AbeLGX3h (ORCPT ); Fri, 7 Dec 2018 18:29:37 -0500 Received: by mail-ot1-f66.google.com with SMTP id i20so5416682otl.0; Fri, 07 Dec 2018 15:29:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=IOMCtzCHH/8bAidk48htasyfLtH4dFYPPTgxZpEhtQo=; b=mBuG4AJlnp6/VfFf+cnwyWJACXyUMM3zOPpgeBmMEM1tifGlOs1PsXysgrPj0H0QRp 2Kg7vj/b6PW7EGXl0SEIv4QGDghdHIfyEvDbvJIRuSv9FSSZjcuj7Jym/SPPH4rV4R1m ZcKboFZ9dsWct9hb9qsd2bas5Dk0pVJvySwqaK8AIBQRONI313BbxEJ+497Vf2vieM9P ZDkIJj7K/kEe69lxDVWNOp3f/+8ZjAnk125nzlSvBv3l03sRP9/ykqFrifLDSYK+fogC FZ+rxSzSM8lpgAs4dTBMVPB60sNGwIySj+pCnTM+Qnak1MENXpQRRsRh8FKYrcn9Nhvy pImQ== X-Gm-Message-State: AA+aEWZuUwhtW9CPtrbF9D4OHX4qA7/aROw7mnoEPLCi4CzfpoxPCnrN FmXy5UxSSOX+KxcRjA+CWQ== X-Received: by 2002:a9d:5249:: with SMTP id q9mr2718240otg.160.1544225375950; Fri, 07 Dec 2018 15:29:35 -0800 (PST) Received: from localhost (24-155-109-49.dyn.grandenetworks.net. [24.155.109.49]) by smtp.gmail.com with ESMTPSA id p203sm5250409oic.49.2018.12.07.15.29.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Dec 2018 15:29:35 -0800 (PST) Date: Fri, 7 Dec 2018 17:29:34 -0600 From: Rob Herring To: Parthiban Nallathambi Cc: marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net, mark.rutland@arm.com, afaerber@suse.de, catalin.marinas@arm.com, will.deacon@arm.com, manivannan.sadhasivam@linaro.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thomas.liau@actions-semi.com, mp-cs@actions-semi.com, linux@cubietech.com, edgar.righi@lsitec.org.br, laisa.costa@lsitec.org.br, guilherme.simoes@lsitec.org.br, mkzuffo@lsi.usp.br, Saravanan Sekar Subject: Re: [PATCH v3 1/4] dt-bindings: interrupt-controller: Actions external interrupt controller Message-ID: <20181207232934.GA28201@bogus> References: <20181126100356.2840578-1-pn@denx.de> <20181126100356.2840578-2-pn@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181126100356.2840578-2-pn@denx.de> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 26, 2018 at 11:03:53AM +0100, Parthiban Nallathambi wrote: > Actions Semi OWL family SoC's provides support for external interrupt > controller to be connected and controlled using SIRQ pins. S500, S700 > and S900 provides 3 SIRQ lines and works independently for 3 external > interrupt controllers. > > Signed-off-by: Parthiban Nallathambi > Signed-off-by: Saravanan Sekar > --- > .../interrupt-controller/actions,owl-sirq.txt | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt > new file mode 100644 > index 000000000000..b3adc4bddf40 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.txt > @@ -0,0 +1,57 @@ > +Actions Semi Owl SoCs SIRQ interrupt controller > + > +S500, S700 and S900 SoC's from Actions provides 3 SPI's from GIC, Listing SoCs here means you have to update this line for every new SoC. > +in which external interrupt controller can be connected. 3 SPI's > +45, 46, 47 from GIC are directly exposed as SIRQ. It has > +the following properties: > + > +- inputs three interrupt signal from external interrupt controller > + > +Required properties: > + > +- compatible: should be "actions,owl-sirq" SoC specific compatibles needed. > +- reg: physical base address of the controller and length of memory mapped > + region. > +- interrupt-controller: identifies the node as an interrupt controller > +- #interrupt-cells: specifies the number of cells needed to encode an interrupt > + source, should be 2. > +- actions,sirq-shared-reg: Applicable for S500 and S700 where SIRQ register > + details are maintained at same offset/register. > +- actions,sirq-reg-offset: register offset for SIRQ interrupts. When registers are > + shared, all the three offsets will be same (S500 and S700). These properties should be implied by the compatible string. > +- actions,ext-irq-range: Identifies external irq number range in different SoCs. Why is this needed? It appears to always be the same. > + > +Example for S900: > + > +sirq: interrupt-controller@e01b0000 { > + compatible = "actions,owl-sirq"; > + reg = <0x0 0xe01b0000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <3>; > + actions,sirq-offset = <0x200 0x528 0x52c>; > + actions,ext-irq-range = <13 15>; > +}; > + > +Example for S700: Examples are examples, not an enumeration of all possible dts entries. So 1 should be sufficient. > + > +sirq: interrupt-controller@e01b0000 { > + compatible = "actions,owl-sirq"; > + reg = <0x0 0xe01b0000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <3>; > + actions,sirq-shared-reg; > + actions,sirq-reg-offset = <0x200 0x200 0x200>; > + actions,ext-irq-range = <13 15>; > +}; > + > +Example for S500: > + > +sirq: interrupt-controller@b01b0000 { > + compatible = "actions,owl-sirq"; > + reg = <0x0 0xb01b0000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <3>; > + actions,sirq-shared-reg; > + actions,sirq-offset = <0x200 0x200 0x200>; > + actions,ext-irq-range = <13 15>; > +}; > -- > 2.17.2 >