Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp1648775imu; Sat, 8 Dec 2018 04:32:11 -0800 (PST) X-Google-Smtp-Source: AFSGD/Wa+Z7mnzggrM1rBd/LvAjEpn/vGIg7OYCvNb256Cfgs8bZHwJswQKBPbIgdJtTNmm681Ib X-Received: by 2002:a62:1c06:: with SMTP id c6mr5587693pfc.157.1544272331740; Sat, 08 Dec 2018 04:32:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544272331; cv=none; d=google.com; s=arc-20160816; b=O85FgRNBx9mD/rlgfFGFzw5ps7Ue5W92wXgxg9YVAsbnLdCBRwRc+GbJRpkXUE1CAB 1B0YOerFZ6YB8LursKEAJ7mHP4A4rxc78r73J9lKuJ30gcXO8G/EPLBe0qfL04eeOmoD f8vxWDRnPCkFmZpMyWTDH0k3Xg8hQIBFYULuvJGpgsQxpuQiVQhBJUD04XjHZOex841H JgWcuZ2/4stOFBpn7VLKFz94foHY617J3EjbwlYaXTykgZFDDqFWr62wClpurg75YBfA XMkQV5xhVKnlv/RMCzFquVY95Dzhc04xSjtR7Yxb+WLR9M0HB4XEH40hwyTs2rbFa9Ji jJPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:in-reply-to:message-id:date:subject:cc:to :from; bh=gxfKnxKRni7N1vRf4zmSEbNoxs8SYnlZyt9jjwAd8hQ=; b=G8EVqk7A16U+4BhXQnPWbQ9uZ+6MBF5rFUAKAK8s0uMxnKt9kHlwB0wi/Ju1CCeNzK NwmWsNSgnK2shSknA+SxFonWLEih24oBzYePkmqrSM+7ltu9S6kqZNG4QDBYUIKIVZJt zEXJY0oKxgix7Csa2N3YGGIdwgcHdIumGtJ2/dpPwWBbH8qgzSTPi8uNzrQmfUYXPtFS rtCIeQv/SqXsFpfepWE7JWtYbxuXic1byu4j19bUVZmJzB51doJ8OxEcqCdYjvN6GFef TwTXaxd9wI/IOrB96WQfZoS62yOIVi3WZggbYicm+cF0/7adumqllyLG5UXCgC9rKMcW c63w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si5357379pls.408.2018.12.08.04.31.41; Sat, 08 Dec 2018 04:32:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726160AbeLHMaj (ORCPT + 99 others); Sat, 8 Dec 2018 07:30:39 -0500 Received: from mail.bootlin.com ([62.4.15.54]:56912 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726121AbeLHMaj (ORCPT ); Sat, 8 Dec 2018 07:30:39 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 49DEE20C94; Sat, 8 Dec 2018 13:30:37 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from localhost.localdomain (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id 061AC20723; Sat, 8 Dec 2018 13:30:37 +0100 (CET) From: Boris Brezillon To: Tudor.Ambarus@microchip.com, marek.vasut@gmail.com, dwmw2@infradead.org, computersforpeace@gmail.com, boris.brezillon@bootlin.com, richard@nod.at, Cyrille.Pitchen@microchip.com Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [v2] mtd: spi-nor: parse SFDP 4-byte Address Instruction Table Date: Sat, 8 Dec 2018 13:30:35 +0100 Message-Id: <20181208123035.9924-1-boris.brezillon@bootlin.com> X-Mailer: git-send-email 2.17.1 X-linux-mtd-patch-notification: thanks X-linux-mtd-patch-commit: ea3ce745426a96252f755aebd8a716c4dabc7450 In-Reply-To: <20181206144330.30860-1-tudor.ambarus@microchip.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2018-12-06 at 14:43:39 UTC, wrote: > From: Cyrille Pitchen > > Add support for SFDP (JESD216B) 4-byte Address Instruction Table. This > table is optional but when available, we parse it to get the 4-byte > address op codes supported by the memory. > Using these op codes is stateless as opposed to entering the 4-byte > address mode or setting the Base Address Register (BAR). > > Flashes that have the 4BAIT table declared can now support > SPINOR_OP_PP_1_1_4_4B and SPINOR_OP_PP_1_4_4_4B opcodes. > > Tested on MX25L25673G. > > Signed-off-by: Cyrille Pitchen > [tudor.ambarus@microchip.com: > - rework erase and page program logic, > - pass DMA-able buffer to spi_nor_read_sfdp(), > - introduce SPI_NOR_HAS_4BAIT > - various minor updates.] > Signed-off-by: Tudor Ambarus Applied to http://git.infradead.org/linux-mtd.git spi-nor/next, thanks. Boris