Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp3468508imu; Mon, 10 Dec 2018 02:44:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/X/jR6lmv0Em+a42VwPgL5rsTAtQNnB0vmt/+3gt19clzINE8HJYlT7aaEDvw7uUzkzmoj7 X-Received: by 2002:a62:8c11:: with SMTP id m17mr11852858pfd.224.1544438679849; Mon, 10 Dec 2018 02:44:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544438679; cv=none; d=google.com; s=arc-20160816; b=wQ4/ROM4eNFcsvr4Tu85/dfwxTdd8W4VzxYyvGW6OW/vnaUp+g84Cx6XxGNmmzSp1D 1ggdITObk6G+pNrMvz5/pKhZcNLjAT4B7nUUbCohKHEzCi8SovxGA7zDjvXHDvmy0L7r kJRgbSetM8vUPcW35a0t12yo7HPhJn7xrn2u//wJPNCHOdwwEgWLC0QPbMRRRYJxbDBq /UiCn9T+XUg3D+EJFVsqQj05WWDZ605A26uXtas75XsOdsMBG0BVBn/FtwrbYJrHnwCS 36vD0D0GKmDXMJ9wYI6fpRHxqs/JHvRqAx/StunkZtPEX+w9Sb8p9xLssKf7qjOw5QQ8 9/Aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:subject:cc:to:from:date; bh=oQnMbPzpNt/eLuHca3KFl0b3bcCO0ul785I2KsqS+H4=; b=e4tS8PYJhv5WO+NHUbuD8/fgorAc0Z6LRBsjd6nvKLpscDcDG1Qg2vltMU0fyMF1HS SbSkrM+irpCMNTOeqSGo+MHae1vJGDf9br5+WpSbmjKDkZi+G5Dk0EpxfrEMD1Z/Jf8J SJMcV+NKnq3Zb5lbHFg7Kx06Aj9QN9pbZ/zDDpenDUiQnpWWU23NklodQEn8ykVRTZ0K x29ReAbYuvi+0TWyHG0H+x3k27yJx1CXwwb/ER4pUllcah0/z68OMqkE2Ys8OPf0Ovkv XNTqBukTL2jrQAQR8+2MPs9LjG9uwQ9QxVbs2aI2t/g/pZ6XnB9Cd3dLXqR+YPoWDWpB cECg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r7si10031856ple.281.2018.12.10.02.44.24; Mon, 10 Dec 2018 02:44:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726685AbeLJKl3 (ORCPT + 99 others); Mon, 10 Dec 2018 05:41:29 -0500 Received: from mail.bootlin.com ([62.4.15.54]:55144 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726167AbeLJKl3 (ORCPT ); Mon, 10 Dec 2018 05:41:29 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id EF34C20CE3; Mon, 10 Dec 2018 11:41:25 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.2 Received: from bbrezillon (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id A2F972037D; Mon, 10 Dec 2018 11:41:15 +0100 (CET) Date: Mon, 10 Dec 2018 11:41:15 +0100 From: Boris Brezillon To: Schrempf Frieder Cc: Yogesh Narayan Gaur , "linux-mtd@lists.infradead.org" , "marek.vasut@gmail.com" , "broonie@kernel.org" , "linux-spi@vger.kernel.org" , "devicetree@vger.kernel.org" , "robh@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "computersforpeace@gmail.com" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v5 1/5] spi: spi-mem: Add driver for NXP FlexSPI controller Message-ID: <20181210114115.3f3c1958@bbrezillon> In-Reply-To: References: <1542366701-16065-1-git-send-email-yogeshnarayan.gaur@nxp.com> <1542366701-16065-2-git-send-email-yogeshnarayan.gaur@nxp.com> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 10 Dec 2018 10:35:35 +0000 Schrempf Frieder wrote: > >>> + > >>> +static int nxp_fspi_exec_op(struct spi_mem *mem, const struct > >>> +spi_mem_op *op) { > >>> + struct nxp_fspi *f = spi_controller_get_devdata(mem->spi->master); > >>> + int err = 0; > >>> + > >>> + mutex_lock(&f->lock); > >>> + > >>> + /* Wait for controller being ready. */ > >>> + err = fspi_readl_poll_tout(f, f->iobase + FSPI_STS0, > >>> + FSPI_STS0_ARB_IDLE, 1, POLL_TOUT, true); > >>> + WARN_ON(err); > >>> + > >>> + nxp_fspi_select_mem(f, mem->spi); > >>> + > >>> + nxp_fspi_prepare_lut(f, op); > >>> + /* > >>> + * If we have large chunks of data, we read them through the AHB bus > >>> + * by accessing the mapped memory. In all other cases we use > >>> + * IP commands to access the flash. > >>> + */ > >>> + if (op->data.nbytes > (f->devtype_data->rxfifo - 4) && > >>> + op->data.dir == SPI_MEM_DATA_IN) { > >>> + nxp_fspi_read_ahb(f, op); > >>> + } else { > >>> + if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) > >>> + nxp_fspi_fill_txfifo(f, op); > >>> + > >>> + err = nxp_fspi_do_op(f, op); > >>> + > >>> + /* Invalidate the data in the AHB buffer. */ > >>> + if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) > >>> + nxp_fspi_invalid(f); > >> > >> E.g. in case of an erase operation or a NAND load page operation, the > >> invalidation is not triggered, but flash/buffer contents have changed. > >> So I'm not sure if this is enough... > > Ok, would change this and have invalidate for all operations. > > Maybe you can find out the correct way through testing with NOR and NAND. Or just invalidate the buffer every time you're doing a read through the AHB. This should always work. I also think we should quickly move to a model where AHB accesses are reserved for dirmap, and regular spi-mem op are limited to non-ahb reads.