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To:     Andy Gross <andy.gross@linaro.org>,
        David Airlie <airlied@linux.ie>,
        David Brown <david.brown@linaro.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Matthias Kaehlcke <mka@chromium.org>,
        Rob Clark <robdclark@gmail.com>,
        Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH v4 4/8] drm/msm/dsi: 14nm PHY: Get ref clock from the DT
From:   Stephen Boyd <swboyd@chromium.org>
User-Agent: alot/0.7
References: <20181204224234.62619-1-mka@chromium.org> <20181204224234.62619-5-mka@chromium.org>
Cc:     Archit Taneja <architt@codeaurora.org>,
        Sean Paul <seanpaul@chromium.org>,
        Rajesh Yadav <ryadav@codeaurora.org>,
        Douglas Anderson <dianders@chromium.org>,
        Jeykumar Sankaran <jsanka@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
        freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, Matthias Kaehlcke <mka@chromium.org>
Date:   Mon, 10 Dec 2018 07:51:19 -0800
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Quoting Matthias Kaehlcke (2018-12-04 14:42:30)
> diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c b/drivers/gpu/drm=
/msm/dsi/pll/dsi_pll_14nm.c
> index 71fe60e5f01f1..032bf3e8614bd 100644
> --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c
> +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c
> @@ -40,7 +40,6 @@
> =20
>  #define NUM_PROVIDED_CLKS              2
> =20
> -#define VCO_REF_CLK_RATE               19200000
>  #define VCO_MIN_RATE                   1300000000UL
>  #define VCO_MAX_RATE                   2600000000UL
> =20
> @@ -139,6 +138,7 @@ struct dsi_pll_14nm {
>         /* protects REG_DSI_14nm_PHY_CMN_CLK_CFG0 register */
>         spinlock_t postdiv_lock;
> =20
> +       struct clk *vco_ref_clk;

Is there any need to keep it in the struct? Or just get the clk, find
the rate, and then put the clk and call pll_14nm_postdiv_register()?

>         u64 vco_current_rate;
>         u64 vco_ref_clk_rate;
> =20